Bluespec, Inc. releases ultra-low footprint RISC-V processor family for Xilinx® FPGAs, offers free quick-start evaluation | Bluespec
Bluespec, Inc., a founding member of RISC-V International and supplier of RISC-V Processor IP and tools, released the MCU RISC-V processor family targeted at ultra-low... Read more.
Codasip Announces UK Hiring for RISC-V Development | Robin Mitchell, ElectroPages
Recently, RISC-V development Codasip announced that it will be looking to hire 100 engineers in the UK to continue its development with RISC-V IP cores. Who is Codasip,... Read more.
Intel Infuses Nios Soft Processors with RISC-V Instruction Set | Aleksandar Kostovic, Tom’s Hardware
Intel updated its lineup of the famous Nios soft processors with the latest Nios V softcore, designed around the open-source RISC-V instruction set architecture.
The... Read more.
Java port eyed for RISC-V hardware | Paul Krill, InfoWorld
Port of the JVM to the open-source licensed instruction set architecture could be ready later this year, if project gets approval to proceed.
The RISC-V hardware... Read more.
European supercomputer project receives RISC-V test chips | Nick Flaherty, EE News Europe
The EPI project has 28 partners from 10 European countries, with the goal of making EU achieve independence in HPC chip technologies and HPC infrastructure. 43 of... Read more.
SiFive HiFive Unmatched Hands-On, Initial RISC-V Performance Benchmarks | Michael Larabel, Phoronix
A few weeks ago I finally received the HiFive Unmatched from SiFive as their flagship RISC-V development board. As a reminder this is their mini-ITX development... Read more.
Chiplet Strategy is Key to Addressing Compute Density Challenges | Balaji Baktha, EE Times
Data center workloads are quickly evolving, demanding high compute density with varying mixes of compute, memory and IO capability. This is driving architectures... Read more.
RISC-V Mentorship: Formal Verification of SweRV EL2 Processor | Shashank V.M.
Background
I was in the final year of my undergraduate degree in Electronics and Communication Engineering when I learnt out about the RISC-V Mentorship program from... Read more.
Intel backs RISC-V for Nios FPGA processor | Nick Flaherty, EE News Europe
Intel's Nios V soft processor for its FPGAs uses the RISC-V: RV32IA architecture with atomic extensions, 5-stage pipeline and AXI4 interfaces.
Intel has developed... Read more.
Security Enclave IP based on RISC-V | Silex Insight
See the latest brochure from Silex Insights on security enclave IP based on RISC-V.
See the full brochure. ... Read more.