Apple Exploring RISC-V, Hiring RISC-V ‘High Performance’ Programmers | Anton Shilov, Tom’s Hardware
Apple is in the process of switching its PCs to Arm-based SoCs, but the company might not be putting all its eggs into one basket, as it is also exploring the emerging... Read more.
Rivos Inc: A Chip Off The Old Block? New RISC-V Startup Garners Many Senior CPU Architects From Apple, Google, Marvell, Qualcomm, Intel, and AMD | Dylan Patel, Semi Analysis
We recently wrote about a new CPU startup that has been garnering very impressive leadership and architects from all over. We have now confirmed the name, Rivos... Read more.
Ventana Micro Systems raises $38M to design datacenter RISC-V processors | Dean Takahashi, Venture Beat
Ventana Micro Systems has raised $38 million to design datacenter RISC-V processors as part of a push to create open hardware.
Ventana’s chips will be based on... Read more.
efabless, Google and SkyWater Are Enabling Us Mere Mortal Makers to Design Our Own Open Source ASICs | Tom Fleet, Hackster.io
We've witnessed a lot happening to help the plight of modern makers in recent years.
We now have professionally-produced panels of PCBs, for mere peanuts.
There... Read more.
AB32VG1 – An Arduino Uno-like RISC-V based development Board Designed for Audio Applications | Electronics-Lab
Bluetrum, a Chinese chip manufacturer known for its high-performance Bluetooth speakers and headsets, has designed an audio player microcontroller for audio applications... Read more.
Linux 5.14 Release – Main changes, Arm, MIPS, and RISC-V architectures | Jean-Luc Aufranc, CNX Software
Linus Torvalds has just announced Linux 5.14 release which happens to almost coincide with the anniversary of the initial announcement of the “small” project... Read more.
Google Summer of Code’21 at FOSSi Foundation: TensorCore Extension for Deep Learning | Nitin Mishra
Introduction
This has been a great summer! I was fortunate enough to be accepted into the Google Summer Code(GSOC) program for the “TensorCore Extension for Deep... Read more.
Accelerating exhaustive and complete verification of RISC-V processors | Ashish Darbari, Axiomise
As processor architecture and design development becomes completely liberated with open-source RISC-V instruction set architecture (ISA), the race to get RISC-V... Read more.
Podcast: David Patterson – “RISC-V, Tesla’s D1 Chip, The Future of Hardware For Machine Learning” | Marwa ElDiwiny, Soft Robotics Podcast
Listen to the full episode of Soft Robotics Podcast.... Read more.
Andes Technology and Cyberon Collaborate to Provide Edge-Computing Voice Recognition Solution on DSP-capable RISC-V Processors | Chip Estimate
Cyberon Corporation, a leading embedded speech solution provider, and Andes Technology (TWSE: 6533), a major supplier for high efficiency, low-power 32/64-bit RISC-V... Read more.