Accelerating ML Recommendation with over a Thousand RISC-V/Tensor Processors on Esperanto’s ET-SoC-1 Chip | Esperanto
Accelerating ML Recommendation with over a Thousand RISC-V/Tensor Processors on Esperanto’s ET-SoC-1 Chip
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RISC-V Embraces AI and ML with a Dual-Core 64-bit Machine Vision/Hearing Development Board | Bill Giovino, Digi-Key Electronics
RISC-V is the latest entry in a resurgence of innovation in 32-bit cores. But this time it’s a different engineering environment. Recent core innovations and competition... Read more.
Video: RT Thread Board Quick Demo | Lance Harvie, Runtime
Watch Lance Harvie's Unboxing Video as he gets his #Bluetrum RISC-V based, RT-Thread inside IoT Board and tests it right away.
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Esperanto Technologies Unveils Energy-Efficient RISC-V-Based Machine Learning Accelerator Chip At Hot Chips 33 Conference | Esperanto Technologies
Esperanto’s Inference Accelerator Delivers Industry-Leading Performance per Watt for ML Recommendation Workloads
Esperanto Technologies™, a developer of high-performance,... Read more.
Bluetrum’s AB32VG1 is Arduino Uno-like RISC-V Based Development Board | Open Cloudware
Bluetrum, a company known for its high-performance Bluetooth speakers and headsets, had announced to work on open source and popular RISC-V core. So, this Chinese... Read more.
Thales, IIIT-Delhi Sign MoU On Open Source Hardware R&D | Editorial Team, Open Source for You
Thales and IIIT-Delhi recently signed an agreement for collaborative research and development in the field of Open Hardware and other allied subjects. The collaboration... Read more.
Zephyr FPGA controller | Antmicro
The Zephyr RTOS has seen tremendous growth recently, with almost 1000 contributors and hundreds of platforms supported. Its vendor-neutral, all-encompassing nature... Read more.
Picocom Accelerates 5G Communications SoC Development with Cadence Palladium Emulation | 01net, Business Wire
Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that Picocom has deployed the Cadence® Palladium® Enterprise Emulation Platform to accelerate the verification... Read more.
Google Summer of Code’21 at FOSSI Foundation: M-extension Support for SERV | Zeeshan Rafique, RISC-V Ambassador
This project aims to design and integrate the integer “Multiplication and Division Unit (MDU)” with SERV core as a co-processor. The MDU will support all the... Read more.
Espressif Expands their RISC-V Portfolio with new ESP32-H2 Thread+Zigbee+BLE SoC | Vishnu Mohanan, Circuit State
Semiconductor company Espressif Systems expands their RISC-V product portfolio with the addition of a new SoC to their ESP32 family. The new offering is the ESP32-H2,... Read more.