Compiling a Benchmark for RISC-V | TechTechPotato
We’ve been after a compile benchmark for a while, something that was easy enough to run on multiple systems but also portable, could be automated, but also... Read more.
RISC-V Summit 2020 showcases a growing ecosystem and a wider application spectrum | Roberto Frazzoli, EDACafe'
here and here – commissioned by Mentor. In fact, 2020 has been a year of growth for this open instruction set architecture, as underlined by Calista Redmond,... Read more.
RISC-V And Marvell Technologies Advances Enable Storage Solutions | Tom Coughlin, Forbes
Read the full article]]>... Read more.
Embedded Studio for RISC-V now comes with SEGGER Linker | Neil Tyler, New Electronics
SEGGER’s Embedded Studio for RISC-V now comes with the SEGGER Linker in addition to the GNU linker. The SEGGER Linker has been developed from the ground... Read more.
Calista Redmond of RISC-V International Tells Us About Its Open-Source Development Model and COVID-19 | Kossi Adzo, startup.info
First of all, how are you and your family doing in these COVID-19 times? Calista Redmond: We’re doing well, thank you. We’re fortunate to be keeping healthy... Read more.
Linker Shrinks RISC-V Application Size | Nick Flaherty, eeNews Europe
Segger is a custom Linker in addition to the GNU linker. This is based on the same code as the Segger Linker for ARM, adding integrated integrity check generation... Read more.
Seagate Announces Its Own RISC-V Cores for Future Storage Controllers | Joel Hruska, Extreme Tech
chips, which are not referred to by any codename or brand, come in two flavors: A high-performance core and an area-optimized core. The high performance core has... Read more.
European R&D marks milestones in steps to deliver fully European platform for space applications | Cordis
eeNews Europe reports. Summing up in part with regard to hardware, a De-RISC post on its first anniversary says “the project has developed the first version of... Read more.
Cobham Gaisler and fentISS Deepen Collaboration around RISC-V | Doug Black, Inside HPC
Read the full article]]>... Read more.
Week In Review: Design, Low Power | Jesse Allen, Semiconductor Engineering
RISC-V RISC-V International CEO Calista Redmond provided an update on the state of the community during the annual RISC-V Summit: “RISC-V has had an incredible... Read more.