RISC-V Day: Microchip Adds RISC-V Hard IP To PolarFire FPGAs | Steve Bush, Electronics Weekly
Microchip detailed an FPGA family with a quad core 64bit RISC-V processor alongside the programmable array. Called ‘PolarFire SoC’, the “architecture brings... Read more.
SiFive Extends Portfolio With 7 Series RISC-V Cores | Camille Kokozaki, Semi Wiki
https://semiwiki.com/semiconductor-ip/sifive/7840-sifive-extends-portfolio-with-7-series-risc-v-cores/]]>... Read more.
Andes Technology and Tiempo Secure Announce Strategic Partnership To Enhance RISC-V Platform Security Up To CC EAL5+ Certification | Andes Technology
HSINCHU (Taiwan) and GRENOBLE (France) , October 1st, 2019 Andes Technology Corporation, a leading supplier of outstanding efficiency, low-power, high performance... Read more.
Chinese Memory, Kioxia, Micron, Xilinx And SDC | Tom Coughlin, Forbes
https://www.forbes.com/sites/tomcoughlin/2019/10/01/chinese-memory-kioxia-micron-xilinx-and-sdc/#5e84a9fb25fd]]>... Read more.
RISC-V Day: Western Digital SweRV Core | Steve Bush, Electronics Weekly
Western Digital SweRV Core EHX1 is a 32-bit, 2-way superscalar, 9-stage pipeline core, originally designed to be used inside the firms data storage own products.... Read more.
RISC-V Day: Trinamic Rocinante Motor Drive | Steve Bush, Electronics Weekly
At the London ‘Getting started with Risc-V’ seminar last week, Onno Martens of German motor drive chip firm Trinamic described why it had chosen Risc-V over... Read more.
RISC-V day: Minres For Virtual Prototyping | Steve Bush, Electronics Weekly
Munich-based Minres was promoting the use of virtual prototypes at the London ‘Getting started with Risc-V’ seminar, held on 26 September. article: https://www.electronicsweekly.com/news/products/software-products/risc-v-day-minres-virtual-prototyping-2019-10/... Read more.
RISC-V Day: Syntacore For Risc-V MCU Core IP | Steve Bush, Electronics Weekly
Syntacore has been developing processor core intellectual property based around the Risc-V instruction set for four years, and its SCRx family now includes eight... Read more.
Libre RISC-V Hybrid CPU/GPU Looking For Cash | Nick Farrell, Fudzilla
The open source Libre RISC-V hybrid CPU/GPU project is applying for eight additional grants from the NLNet Foundation. For those not in the know, the NLNet Foundation... Read more.
SiFive Announces New DesignShare IP Partnerships | SiFive
SAN MATEO, Calif., Sept. 30, 2019 /PRNewswire/ — SiFive, Inc., the leading provider of commercial RISC-V processor IP and silicon solutions, announced today... Read more.