Siemens streamlines, secures embedded RISC-V development with latest Nucleus ReadyStart solution | Siemens
Siemens Digital Industries Software announced today availability of its leading Nucleus™ ReadyStart™ solution for embedded development targeting the fast-growing... Read more.
QWERTY’s ICE-V Wireless Packs RISC-V, FPGA, Bluetooth, and Wi-Fi Into a Single Handy Board | Gareth Halfacree, Hackster.io
The ICE-V Wireless crowdfunding campaign is now live, with 250 units available at $75 plus shipping each.
Backers ordering the low-cost FPGA development board during... Read more.
Linux on RISC-V | Drew Fustini, BayLibre
See the full presentation. ... Read more.
Renode 1.13 for improved machine learning and pre-silicon development | Antmicro
After a longer while, we are excited to announce that the next release of Renode is here. Since the previous release we’ve been busy working with many customers... Read more.
HiPEAC Info Issue 66 | HiPEAC
Thanks to a wealth of industry support, RISC-V International is becoming ever stronger: ‘Many large companies have joined the foundation, meaning that no single... Read more.
Accelerating ML Recommendation With Over 1,000 RISC-V/Tensor Processors on Esperanto’s ET-SoC-1 Chip | David R. Ditzel, Esperanto Technologies
Machine learning (ML) recommendation workloads have demanding performance and memory requirements and, to date, have largely been run on servers with x86 processors.... Read more.
Accelerating ML Recommendation with over a Thousand RISC-V/Tensor Processors on a 7nm Chip | Stanford Online
To accelerate Machine Learning Recommendation and other workloads, Esperanto Technologies has implemented over a thousand low-power RISC-V processors on a single... Read more.
Experimental evaluation of neutron-induced errors on a multicore RISC-V platform | Fernando Fernandes dos Santos (TARAN), Angeliki Kritikakou (TARAN), Olivier Sentieys (TARAN)
RISC-V architectures have gained importance in the last years due to their flexibility and open-source Instruction Set Architecture (ISA), allowing developers to... Read more.
Thermal (IR) Imaging Pipeline (ISP) Core on PolarFire® SoC FPGA SoM | Microchip
Our Mi-V partner, Digital Core Technologies (DCT), has developed a thermal Imaging Pipeline on PolarFire® SoC FPGA. The thermal Image Signal Processor (ISP) is... Read more.
First RISC-V 3D GPUs Will Be Demoed Next Week | Mark Tyson, Tom’s Hardware
We often hear about RISC-V, its competitive open-source architecture, and how it is making inroads into the CPU industry. However, last year we reported on an open... Read more.