An Efficient Lightweight Cryptographic Instructions Set Extension for IoT Device Security | Wajih El Hadj Youssef, Ali Abdelli, Fethi Dridi, Rim Brahim, and Mohsen Machhout, Faculty of Sciences of Monastir, Electronics and Micro-Electronic Laboratory (LEME)
Abstract
The Internet of Things is changing all sectors such as manufacturing, agriculture, city infrastructure, and the automotive industry. All these applications... Read more.
India goes RISC-V with VEGA processors | Jean-Luc Aufranc, CNX Software
One of the main advantages of RISC-V architecture is that it is open, so any organization with the right skills can develop its own cores, and India’s government... Read more.
Enhancing supply chain security for embedded systems: Renode Dashboard for Zephyr RTOS adds new SBOM capabilities by default | Michael Gielda (Antmicro) and Kate Stewart (Linux Foundation), Linux.com
A Software Bill of Materials (or SBOM) makes the information about the software components running on a system available. Transparency and summarization are needed... Read more.
Rust Cross-Compilation | Daniel Mangum, RISC-V BYTES
This is part of a series on the blog where we explore RISC-V by breaking down real programs and explaining how they work. You can view all posts in this series... Read more.
Do You Know For Sure Your RISC-V RTL Doesn’t Contain Any Surprises? | Joseph Hupcey III, Semiconductor Engineering
Given the relative novelty and complexity of RISC-V RTL designs, whether you are buying a commercially supported core or downloading a popular open-source offering,... Read more.
RISC-V CPU Design Courses | Redwood EDA, LLC
These courses all are made available by Redwood EDA, LLC FREE through June 2022, so enjoy!
Computer Architecture is traditionally learned in a university setting... Read more.
Intel May Enable Discrete GPU Driver Development for Arm, RISC-V | Anton Shilov, Tom’s Hardware
Intel takes aim at Linux enthusiasts with a new initiative.
Intel has released request for comments (RFC) patches for its Linux kernel graphics driver enabling... Read more.
Gateway Implementations with RISC-V | Alex Pluemer, Mouser Electronics
Reduced instruction-set architectures (ISAs) such as RISC-V provide greater efficiency and less drag on resources than their more complex counterparts. Industrial... Read more.
Bringing chips back from the dead : MPW-1 Show-off | Sylvain Munaut
In this video I show off the current state of my efforts to bring up the PyFive test chips produced as part of the very first google sky130 shuttle ( MPW-One ).... Read more.
Semico Research’s New Report Predicts There Will Be 25 Billion RISC-V-Based AI SoCs By 2027 | Rich Wawrzyniak, Semico Research Corporation
Research underscores current RISC-V architecture momentum, emphasizing impressive growth in consumer, enterprise and communication markets
RISC-V is leading... Read more.