NSITEXE, Inc. (Head Office: Minato-ku, Tokyo; CEO: Yukihide Niimi; hereinafter “NSITEXE”) has announced that it will contribute to the embedded systems by expanding its product lineup with the addition of…
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With four processor cores, 8GB of RAM, dual gigabit Ethernet, PCIe, and a graphics processor, this StarFive JH7110-based board impresses. Open-hardware specialist PINE64 has released more details on its upcoming…
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Andes Technology Corporation (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099), a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and Founding Premier member of RISC-V International, submits MLPerf Tiny v0.7 benchmark…
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I was fortunate enough to attend the 59th Design Automation Conference (DAC) in San Francisco last week. Aside from the Covid closure in 2020 I’ve been going to DAC since…
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RISC-V International has released a number of new specifications that enhance the RISC-V ecosystems. I talked with Chief Technology Officer for RISC-V International, Mark Himelstein, about their latest specifications. This includes E-Trace, the…
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Imagination Technologies has announced its first real-time embedded RISC-V CPU. Called IMG RTXM-2200, the 32bit core is aimed at SoCs for networking, packet management, storage controllers, sensor management for AI…
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Codasip has opened a new RISC-V design facility in Greece, hiring Giorgos Nikiforos from Apple as director. Nikiforos brings decades of engineering experience in hardware design and in system verification…
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At the beginning of the year, we wrote about WCH CH32V307 RISC-V microcontroller and a development board with 8 UART ports controlled over Ethernet. I’ve now been informed of…
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Two hardware makers are planning to offer chips later this year featuring the RISC-V free and open architecture standard, joining the US $180 Linux-capable StarFive VisionFive RISC-V board that went…
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This article is part of the TechXchange: RISC-V: The Instruction-Set Alternative What you’ll learn: What is RISC-V? The basics of RISC-V. Applications and uses of RISC-V. RISC-V is described as…
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