In the Media

In case you are in need of a tiny WiFI or Bluetooth-connected board with an RGB LED matrix, two have shown up on Banggood with basically the same 25 RGB…

Sipeed have been busy leveraging developments in the RISC-V arena, with an interesting, low-cost module they call the Lichee RV. It is based around the Aliwinner D1 SoC (which contains a Pingtou Xuantie C906 for…

Abstract: We present CFU Playground, a full-stack open-source framework that enables rapid and iterative design of machine learning (ML) accelerators for embedded ML systems. Our toolchain tightly integrates open-source software,…

#SiFive p650 high performance #RISCV cores w/ Vector and Hypervisor extension while AMD is hiring RISCV engineers, too?! Watch the full video. 

The RISC-V Summit 2021 highlighted to the world that the future of RISC-V has no limits! 2021 has been an outstanding year for SiFive, and the biggest in its history,…

Champions of the open-standard ISA expect it to start displacing competitive offerings en masse over the next few years. While that remains to be seen, the introduction of custom RISC-V…

Chip technologies from Arm and x86 are getting the most attention amid semiconductor shortages and trade wars. But in the background, the open-source RISC-V chip architecture is stealthily emerging as…

Mobileye and its parent company Intel may not be attending CES 2022 in person, but they are making some news.The Israel-based market leader in vision-based advanced driver assist systems (ADAS) has…

Abstract: Simodense is a high-performance open-source RISC-V (RV32IM) softcore, optimised for exploring custom SIMD instructions. In order to maximise SIMD instruction performance, the design’s memory system is optimised for streaming…

Dan is joined by Balaji Baktha, founder and CEO of Ventana Micro. Balaji explores the application of RISC-V in high-performance applications and the specific advantages of a chiplet-based approach. RISC-V Summit Panel. The…