In the Media

A quartet of computer science boffins have showcased work on bringing the OpenCL programming framework to a wide range of RISC-V chips – improving their suitability for highly parallel workloads…

When it comes to designing your own CPU core, you primarily need to get an open-source ISA (instruction set architecture). This open-source ISA will help the CPU understand the programs…

The world's most powerful RISC-V development platform is here, and we are building a computer with it! This is a first look at SiFive's new reduced instruction set development board,…

The DR1000C, a data flow processor (DFP) developed by NSITEXE, Inc. (headquartered in Minato Ward, Tokyo, Japan; President and CEO: Yukihide Niimi; hereinafter “NSITEXE”) has achieved ISO 26262 ASIL D…

Chinese smart wearable device manufacturer Zepp Health, previously known in the international market as Huami, has announced that it planned to unveil its own OS, labelling it “a wearable system…

Imperas Software Ltd., the leader in virtual platforms and high-performance software simulation, today announced that Andes Technology Corp., a leading supplier of performance-efficient and extensible 32/64-bit RISC-V CPU cores and a…

The first commercial development boards featuring Espressif's RISC-V-based ESP32-C3, a drop-in replacement for the popular ESP8266, have appeared on the market — costing as little as $4 a piece. Espressif's…

This is part of a series on the blog where we explore RISC-V by breaking down real programs and explaining how they work. You can view all posts in this series on…

The importance of open-source hardware has been increasing in recent years with the introduction of the RISC-V Open ISA. This has also accelerated the push for support of the open-source…

Ask ten different engineers how they would design an AI accelerator and you’ll get ten different ways to arrange the billions of transistors on a modern leading-edge chip. With someone…