In the Media Archives

Thank You For Attending RISC-V Summit North America! | Missed the event? Watch Now.

Mar 26

Renesas Introduces Industry’s First General-Purpose 32-bit RISC-V MCUs with Internally Developed CPU Core

By RISC-V Community News In the Media

TOKYO, Japan ― Renesas Electronics Corporation (TSE:6723), a premier supplier of advanced semiconductor solutions, today announced the industry’s first general-purpose 32-bit RISC-V-based microcontrollers (MCUs) built with an internally developed CPU core.…

Mar 26

Podcast EP212: A View of the RISC-V Landscape with Synopsys’ Matt Gutierrez

By RISC-V Community News In the Media

Dan is joined by Matt Gutierrez. Matt joined Synopsys in 2000 and is currently Sr. Director of Marketing for Processor & Security IP and Tools. His current responsibilities include the…

Mar 25

Andes Technology: Pioneering the Future of RISC-V CPU IP

By Anisha Sharma In the Media

On September 13, 2021, Andes Technology Corporation successfully issued its GDR (Global Depositary Receipt) public offering on the Luxembourg Stock Exchange. At the time it made Andes the only international public RISC-V…

Mar 25

Quad core RISC-V FPGA is automotive qualified

By RISC-V Community News In the Media

Efinix in California has launched a line of FPGA devices with 32bit RISC-V cores specifically for the automotive industry. The Titanium Ti375 is automotive qualified and with the Efinix Efinity tool…

Mar 22

Tenstorrent and MosChip Partner on High Performant RISC-V Design

By RISC-V Community News In the Media

SANTA CLARA, Calif., March 13, 2024 /PRNewswire/ --Tenstorrent and MosChip Technologies announced today that they are partnering on design for Tenstorrent's cutting-edge RISC-V solutions. In selecting MosChip Technologies, Tenstorrent stands to strongly…

Mar 20

MIPS Expands Global Footprint with New Design Center and Talent for Systems Architects and AI Compute

By RISC-V Community News In the Media

SAN JOSE, Calif.--(BUSINESS WIRE)--MIPS, a leading developer of efficient and configurable compute cores, today announced the company’s global expansion with the launch of a new R&D center in Austin, TX,…

Mar 20

StarFive’s RISC-V Based JH-7110 Intelligent Vision Processing Platform Adopted VeriSilicon’s Display Processor IP

By RISC-V Community News In the Media

SHANGHAI--(BUSINESS WIRE)--VeriSilicon (688521.SH) today announced the successful integration of its Display Processor IP DC8200 into StarFive’s JH-7110 RISC-V mass production SoC. With high performance, low power consumption and high security…

Mar 20

A custom RISC-V vector instruction to accelerate structured-sparse matrix multiplications

By RISC-V Community News In the Media

A novel AI-acceleration paper presents a method to optimize sparse matrix multiplication for machine learning models, particularly focusing on structured sparsity. Structured sparsity involves a predefined pattern of zero values in the…

Mar 15

[VIDEO] BeagleV-Fire Out of Box Experience | RISC-V & FPGA | Microchip PolarFire | BeagleBoard.org

By RISC-V Community News In the Media

Watch the full video.

Mar 14

Global and China Automotive RISC-V Chip Industry Research Report 2024: Customized Chips May Become the Future Trend, and RISC-V will Challenge ARM

By Anisha Sharma In the Media

DUBLIN, March 14, 2024 /PRNewswire/ -- The "Automotive RISC-V Chip Industry Research Report, 2024" report has been added to ResearchAndMarkets.com's offering. Read the full release.

In the Media

Renesas Introduces Industry’s First General-Purpose 32-bit RISC-V MCUs with Internally Developed CPU Core

Podcast EP212: A View of the RISC-V Landscape with Synopsys’ Matt Gutierrez

Andes Technology: Pioneering the Future of RISC-V CPU IP

Quad core RISC-V FPGA is automotive qualified

Tenstorrent and MosChip Partner on High Performant RISC-V Design

MIPS Expands Global Footprint with New Design Center and Talent for Systems Architects and AI Compute

StarFive’s RISC-V Based JH-7110 Intelligent Vision Processing Platform Adopted VeriSilicon’s Display Processor IP

A custom RISC-V vector instruction to accelerate structured-sparse matrix multiplications

[VIDEO] BeagleV-Fire Out of Box Experience | RISC-V & FPGA | Microchip PolarFire | BeagleBoard.org

Global and China Automotive RISC-V Chip Industry Research Report 2024: Customized Chips May Become the Future Trend, and RISC-V will Challenge ARM

About

Technical Steering Committee
Board of Directors
FAQ
Contact Us
About RISC-V
History of RISC-V
Blog
News
Announcements
Genealogy

Policies

Privacy Policy
Code of Conduct
Antitrust Policy
Brand Guidelines

Specification

Ratified
Under Development
Contribute

Developers

Get Started
Training
Development Partners
Developer Boards
Labs
Mentorship
Technical Wiki

Industries

Automotive
Artificial Intelligence
Case Studies
Exchange
Landscape
Software Ecosystem Dashboard

Events

RISC-V Summit
Calendar
Videos
Community Meetings

Members

Current Members
Resources
Recognition

Resources

Get RISC-V Gear

Join RISC-V International

Becoming a member of RISC-V International allows companies and individuals to actively influence the development of an open, royalty-free instruction set architecture, driving innovation in custom processor designs.

In the Media

Subscribe for updates, event info, webinars, and the latest community news

About

Policies

Specification

Developers

Industries

Events

Members

Resources

Join RISC-V International

Becoming a member of RISC-V International allows companies and individuals to actively influence the development of an open, royalty-free instruction set architecture, driving innovation in custom processor designs.