RISC-V has ratified its extensions for code compression to reduce the memory requirements when using the open instruction set architecture. This is particularly important for microcontrollers that have limited memory…
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CAMPBELL, Calif. – May 2, 2023 – Arteris, Inc. (Nasdaq: AIP), a provider of system IP designed to accelerate system-on-chip (SoC) creation, today announced that Tenstorrent, the Toronto-based AI chip…
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YouTuber Charles Lohr has come up with a novel and low-cost way to drive Nixie display tubes, turning an ultra-low-cost RISC-V microcontroller into what he describes as a "software-defined flyback…
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CAMPBELL, Calif., May 2, 2023 — Arteris, Inc., a leading provider of system IP which accelerates system-on-chip (SoC) creation, today announced Tenstorrent has licensed Ncore and FlexNoC interconnect IP for…
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The research wing of European RISC-V processor core developer Codasip and French embedded FPGA firm Menta have joined a project to build a 3D neuromorphic AI chip. Read the full…
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The RT-Thread Global Tech Conference (RGTC) is an annual event that brings together developers from around the world to focus on the latest developments in RT-Thread basic software technology and…
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Author: Paul Curtis In previous blog posts I have described the division algorithms SEGGER implemented in emRun. However, which algorithm is best (in terms of code size, execution speed, or…
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Esperanto Technologies Inc. (Mountain View, Calif.) has announced it has ported a range of generative AI models to its RISC-V hardware. Initial work includes running a range of large language…
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MOUNTAIN VIEW, Calif.--(BUSINESS WIRE)--Esperanto Technologies™, the leading developer of high performance, energy-efficient artificial intelligence solutions based on the RISC-V instruction set, today announced that it has ported and is running…
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VyperCore Ltd. (Bristol, England), a startup with plans to develop novel processor technology, has raised £4 million (about US$5 million) in seed funding. The company was founded by Ed Nutting,…
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