Written in RISC-V assembly, this tiny Forth port is open source and fully functional on the Longan Nano microcontroller. Developer Alexander Williams has written and released a "tiny hand-written" port…
Top Of The News Google announced it will support the RISC-V architecture with the Android open-source operating system. In a keynote at the RISC-V Summit, Lars Bergstrom, Google’s director of engineering for the Android Platform Programming Languages,…
In a time when Raspberry Pi’s are few and far between, alternative options such as the MangoPi MQ-PRO are increasingly interesting. In this review we cover the features, functionality and…
As RISC-V continues to increase in popularity, many businesses are now turning to the processor architecture, including Google, which has just recently announced that RISC-V will become a major platform…
Open source by itself doesn’t guarantee security. It still comes down to the fundamentals of design. When the Meltdown and Spectre vulnerabilities were first uncovered in 2018, they heralded an…
A friendly introduction to the core concepts in the RISC-V “V” Vector Extension, version 1.0. While the basic idea of vector processing is simple, the details can get complex. The…
I am excited to announce that I will be giving a talk at the HiPEAC conference on the RISC-V ISA for posit arithmetic! HiPEAC is a leading conference in the…
Espressif Systems (SSE: 688018.SH) today announces the upcoming release of its latest SoC, ESP32-P4. It is powered by a dual-core RISC-V CPU with an AI instructions extension, an advanced memory…
Ventana Micro Systems announced that it will be presenting at the Consumer Electronics Show being held in Las Vegas (CES) between Jan. 5-8 the Veyron V1, the first RISC-V processor to provide performance that…
Abstract - The execution of machine learning (ML) algorithms on resource-constrained embedded systems is very challenging in edge computing. To address this issue, ML accelerators are among the most efficient…