Featured Work

Monte Cimone v3: Where RISC-V Stands in High-Performance Computing

By September 23, 2026No Comments4 min read

Project Snapshot

The Monte Cimone project is a RISC-V-based testbed for High-Performance Computing (HPC) clusters. This work presents Monte Cimone v3 (MCv3), the third iteration of the system, based on the SOPHGO Sophon SG2044 processor. MCv3 is evaluated using HPL and STREAM benchmarks with power measurements, and compared against Intel Xeon Platinum 8480+ and NVIDIA Grace CPU Superchip platforms. The SG2044 more than doubles single-core performance over SG2042 and improves scalability in the cluster setup. MCv3 reaches 3.08 GFLOPs/W energy efficiency (≈10× MCv1) and achieves 46% of Sapphire Rapids and 91% of Grace CPU Superchip performance at its peak efficiency point. 

In Their Own Words

Poster Preview

Want to Dive Deeper?

Read the full paper on the author’s site

Continue Reading

Meet the Authors

Emanuele Venieri
PhD Student at University of Bologna in Italy

Emanuele Venieri received his BSc and MSc degrees in Electronics Engineering from the University of Bologna in 2021 and 2024, respectively. Since 2024, he has been working at the University of Bologna as a Research Fellow, and since 2025 he has been pursuing a PhD degree. His research interests include RISC-V hardware architectures and software optimization for high-performance computing (HPC), with a particular focus on vector and matrix extensions.

Simone Manoni

Post-doctoral Researcher at University of Bologna in Italy

Simone Manoni earned his PhD in Electronic Engineering at University of Bologna where he is currently a Post-Doctoral researcher. His research interests include hardware-software co-design for Secure and Efficient Edge AI systems

Giacomo Madella

PhD Student at university of Bologna in Italy

Giacomo Madella received the BSc in computer engineering from University of Modena and Reggio Emilia in 2021 and M.Sc. degrees in computer engineering from University of Bologna in 2023, where he is currently working toward the PhD degree. His research interests include HPC, RISC-V and AI.

Federico Proverbio
Electronics Engineer at E4 Computer Engineering in Italy

Federico Proverbio holds a BSc and an MSc in Electronics Engineering from Politecnico di Milano. Since 2024, he has been working as an Electronics Engineer at E4 Computer Engineering.

Federico Ficarelli

Senior Researcher at CINECA in Italy

Federico Ficarelli is a senior researcher with over a decade of experience in industrial R&D at Cineca, the Italian national high-performance computing center. His work spans applied HPC in domains such as oil & gas and computational biology. He currently leads the Extreme Scale Drug Discovery R&D group at Cineca, focusing on the integration of post-Exascale computing and AI for industrial drug discovery. He coordinates efforts in several EU projects exploring novel RISC-V computing architectures and advanced compilation techniques. He earned a Ph.D. in Data Science and Computation from the University of Bologna, Italy, in 2025. 

Luca Benini

Full Professor at University of Bologna in Italy

Luca Benini (Fellow, IEEE) holds the chair of Digital Circuits and Systems at ETH Zurich and is Full Professor at the Università di Bologna. Dr. Benini’s research interests are in energy-efficient computing systems design, from embedded to high performance. He is a Fellow of the ACM and a member of Academia Europaea. 

Andrea Bartolini
Associate Professor at University of Bologna in Italy

Andrea Bartolini holds an associate professor position at the University of Bologna. He is an active researcher in the domain of power and thermal management in a wide range of computing systems. In this field he has published more than won the Best Paper Award in DATE 2013, the Best IP Paper Award in DATE 2014 Conferences, and the Gauss Award at ISC 2016. He has published more than 85 papers in international peer-reviewed conferences and journals. He has collaborated with several international research and companies. Andrea Bartolini has been the main responsible for the design of advance power management and monitoring support on the first Cavium ThunderX cluster and on the D.A.V.I.D.E. system today ranked on the top20 most energy efficient supercomputers worldwide.