XMOS Announces Software-defined SoC Platform Now Compatible with RISC-VBristol, UK – December, 12 2022 – XMOS today reveals a RISC-V compatible architecture for the fourth generation of its xcore platform. The collaboration delivers the…
Codasip Launches SecuRISC5 initiativeMunich, Germany – December 12, 2022 – Codasip, the leader in processor design automation and RISC-V processor IP, today launched SecuRISC5, a Codasip initiative to…
Imperas releases new updates, test suites, and functional coverage library to support the rapid growth in RISC-V VerificationOxford, United Kingdom – December 12th, 2022 – Imperas Software Ltd., the leader in RISC-V simulation solutions, today announced the latest updates to ImperasDV to support the…
Microchip Showcases RISC-V-Based FPGA and Space-Compute Solutions at RISC-V SummitCHANDLER, Ariz. – December 8, 2022 – Mid-range FPGAs and System-on-Chip (SoC) FPGAs have played a major role in moving computer workloads to the network edge.…
Imperas and Imagination Collaborate on Providing Virtual Platform Models for the Catapult RISC-V CPU FamilyOxford, United Kingdom – December 8th, 2022 – Imperas Software Ltd.,the leader in RISC-V simulation solutions, today announced that Imagination Technologies, a global technology leader in silicon IP…
Codasip Launches Codasip Labs to Accelerate Advanced TechnologiesMunich, Germany – December 7, 2022 – Codasip, the leader in processor design automation and RISC-V processor IP, today announced the establishment of Codasip Labs as…
Andes Announces RISC-V Multicore 1024-Bit Vector Processor: AX45MPVSAN JOSE, CA – December 7, 2022 – Andes Technology Corporation (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099), a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and…
Andes Technology Unveils The AndesCore™ D23, A Feature-Rich, Low-Power And Highly-Secured Entry-Level RISC-V ProcessorSAN JOSE, CA - December 7, 2022 - Andes Technology Corporation (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099), a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and…
Join Andes At RISC-V Summit; Learn The Only ISO 26262 Fully-Compliant RISC-V CPU, The Latest Multicore 4-Way Out-Of-Order Processor & The Multicore 1024-Bit Vector ProcessorSAN JOSE, CA – December 7, 2022 – Andes Technology Corporation (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099), a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and…
Andes Technology And Parasoft Collaborate To Provide Seamless Software Testing Tools For Automotive Functional Safety ApplicationsSAN JOSE, CA - December 7, 2022 - Andes Technology, a leading supplier of high-performance, low-power 32/64-bit RISC-V processor cores and founding premier member of RISC-V…
MIPS Selects Imperas for Advanced Verification of High-Performance RISC-V Application-class ProcessorsOxford, United Kingdom – December 7th, 2022 – Imperas Software Ltd.,the leader in RISC-V simulation solutions, announced today that MIPS, a leading developer of highly scalable RISC…
Standard Library Expertise at the RISC-V Summit Presented by Solid SandsAmsterdam, The Netherlands – December 6, 2022 – Solid Sands, the world-leading provider of testing and qualification technology for compilers and libraries, will share its knowledge…
Think Silicon NEOX RISC-V GPU offers 3D graphics or AI acceleration | Jean-Luc Aufranc, CNX SoftwareThink Silicon NEOX GPU family with models optimized for graphics (NEOX|G) or artificial intelligence (NEOX|A) is based on the RISC-V RV64C ISA instruction set with…
Siemens streamlines, secures embedded RISC-V development with latest Nucleus ReadyStart solution | SiemensSiemens Digital Industries Software announced today availability of its leading Nucleus™ ReadyStart™ solution for embedded development targeting the fast-growing adoption of the RISC-V architecture. Building…
QWERTY’s ICE-V Wireless Packs RISC-V, FPGA, Bluetooth, and Wi-Fi Into a Single Handy Board | Gareth Halfacree, Hackster.ioThe ICE-V Wireless crowdfunding campaign is now live, with 250 units available at $75 plus shipping each. Backers ordering the low-cost FPGA development board during…
Thanks to a wealth of industry support, RISC-V International is becoming ever stronger: ‘Many large companies have joined the foundation, meaning that no single company…
Accelerating ML Recommendation With Over 1,000 RISC-V/Tensor Processors on Esperanto’s ET-SoC-1 Chip | David R. Ditzel, Esperanto TechnologiesMachine learning (ML) recommendation workloads have demanding performance and memory requirements and, to date, have largely been run on servers with x86 processors. To accelerate…
Accelerating ML Recommendation with over a Thousand RISC-V/Tensor Processors on a 7nm Chip | Stanford OnlineTo accelerate Machine Learning Recommendation and other workloads, Esperanto Technologies has implemented over a thousand low-power RISC-V processors on a single chip along with a…
RISC-V architectures have gained importance in the last years due to their flexibility and open-source Instruction Set Architecture (ISA), allowing developers to efficiently adopt RISC-V…
First RISC-V 3D GPUs Will Be Demoed Next Week | Mark Tyson, Tom’s HardwareWe often hear about RISC-V, its competitive open-source architecture, and how it is making inroads into the CPU industry. However, last year we reported on…
An Introduction to RISC-V—Understanding RISC’s Open ISA | Eduardo Corpeño, All About CircuitsThis article is a primer into the basics of RISC-V. The open architecture philosophy is exposed, along with a technical description of the modular ISA,…
Think Silicon to Unveil Industry’s First RISC-V 3D GPU at Embedded World 2022 | Think Silicon, Yahoo! FinanceThink Silicon®, a leader in ultra-low power graphics IP, will showcase the industry’s first RISC-V-based GPU – the NEOX™ G-Series & A-Series – at Embedded…
