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Nordic Semi sets up RISC-V design team | Nick Flaherty, EE News Europe
RISC-V verification ecosystem releases complete source file access | Imperas Software, Electropages
MangoPi MQ Pro with 64-bit RISC-V processor | Julian Horsey, Geeky Gadgets
HydraUSB3 RISC-V MCU board combines USB 3.0 with HSPI and SerDes high-speed interfaces | Jean-Luc AufrancMilandr MDR32F02FI is a RISC-V microcontroller for (Russian) electricity meters | Jean-Luc Aufranc, CNX Software
Low Power HW Accelerator For FP16 Matrix Multiplications For Tight Integration Within RISC-V Cores | Yvan Tortorella, Luca Bertaccini, Davide Rossi, Luca Benini, Francesco ContiFirst open-source SystemVerilog RISC-V processor functional coverage library | Nick Flaherty, EE News Europe
NSITEXE expands products lineup of RISC-V CPU supported functional safety | NSITEXE, Design and Reuse
PINE64 Formally Unveils the StarFive JH7110-Powered Star64 RISC-V Single-Board Computer | Gareth Halfacree, Hackster.io
Welcoming RISC-V International Board Members
RISC-V Global Summit Will Showcase Enormous Momentum for the Open Standard Hardware Architecture and Software Ecosystem | RISC-V International
Architectures for Matrix Extension in CPU | Jiang Zhao, Alibaba Cloud
How to run Ockam on RISC-V Linux | OckamNSITEXE DR1000C, a RISC-V based parallel processor IP with vector extension (DFP: Data Flow Processor) has been licensed for Renesas’ new RH850/U2B Automotive MCUs | NSITEXE
5 Talks on RISC-V Online Event | Veriest
Kneron’s RISC-V AI Chip Intends to Bring L1 and L2 Autonomy to “Any Vehicle” | Jake Hertz, All About Circuits
A RISC-V Simulator and Benchmark Suite for Designing and Evaluating Vector Architectures | Cristóbal Ramírez Lazo, César Alejandro Hernández, Oscar Palomar, Osman Sabri Unsal, Marco Antonio Ramírez, and Adrían CristalPiDRAM: A Holistic End-to-end FPGA-based Framework for Processing-in-DRAM | Ataberk Olgun, Juan Gómez Luna, Konstantinos Kanellopoulos, Behzad Salami, Hasan Hassan, Oğuz Ergin, and Onur Mutlu
Andes Technology Issues GDR to Be Listed on Luxembourg | Andes Technologies
Open Source RT-Thread IoT OS Becomes a Member of RISC-V! | RT-Thread
Codasip Founder Karel Masařík Elected to RISC-V Technical Steering Committee | Codasip
Women Of The C-Suite: Calista Redmond Of RISC-V On The Five Things You Need To Succeed As A Senior Executive | Charlie Katz, Authority Magazine
VLSI Design Careers | Maven Silicon, Semiconductor Engineering
Nordic Semi sets up RISC-V design team | Nick Flaherty, EE News EuropeLeading European chip design Nordic Semiconductor is setting up a new design team to develop a processor core based on the open RISC-V instruction set.…
RISC-V verification ecosystem releases complete source file access | Imperas Software, ElectropagesImperas Software Ltd has released the first open-source SystemVerilog RISC-V processor functional coverage library for RISC-V cores. This initial release is for RV32IMC and RV64.…
MangoPi MQ Pro with 64-bit RISC-V processor | Julian Horsey, Geeky GadgetsMangoPi has officially launched their second RISC-V mini PC after unveiling it earlier this year. The MangoPi MQ Pro measures just 65 x 30mm and…
HydraUSB3 RISC-V MCU board combines USB 3.0 with HSPI and SerDes high-speed interfaces | Jean-Luc AufrancBenjamin VERNOUX has launched the HydraUSB3 V1 board based on WCH CH569 RISC-V MCU as a developer platform to experiment with high-speed protocols like HSPI and SerDes through a…
Milandr MDR32F02FI is a RISC-V microcontroller for (Russian) electricity meters | Jean-Luc Aufranc, CNX SoftwareLast year, we wrote about the Made-in-Russia Mikron MIK32 RISC-V microcontroller with features similar to STM32L0 Arm Cortex-M0+, and I was recently told that the first fully packed samples…
Low Power HW Accelerator For FP16 Matrix Multiplications For Tight Integration Within RISC-V Cores | Yvan Tortorella, Luca Bertaccini, Davide Rossi, Luca Benini, Francesco ContiThis new technical paper titled “RedMulE: A Compact FP16 Matrix-Multiplication Accelerator for Adaptive Deep Learning on RISC-V-Based Ultra-Low-Power SoCs” was published by researchers at University…
First open-source SystemVerilog RISC-V processor functional coverage library | Nick Flaherty, EE News EuropeImperas Software in the UK has developed the first open source SystemVerilog RISC-V processor functional coverage library for RISC-V cores. The initial release is for…
NSITEXE expands products lineup of RISC-V CPU supported functional safety | NSITEXE, Design and ReuseNSITEXE, Inc. (Head Office: Minato-ku, Tokyo; CEO: Yukihide Niimi; hereinafter “NSITEXE”) has announced that it will contribute to the embedded systems by expanding its product…
PINE64 Formally Unveils the StarFive JH7110-Powered Star64 RISC-V Single-Board Computer | Gareth Halfacree, Hackster.ioWith four processor cores, 8GB of RAM, dual gigabit Ethernet, PCIe, and a graphics processor, this StarFive JH7110-based board impresses. Open-hardware specialist PINE64 has released…
Welcoming RISC-V International Board MembersWelcome to Our New Elected RISC-V Board Members By Calista Redmond, CEO RISC-V International, August 1, 2022 We are honored to share the results of…
RISC-V Global Summit Will Showcase Enormous Momentum for the Open Standard Hardware Architecture and Software Ecosystem | RISC-V InternationalCall for Proposals, Sponsorship Sales, and Attendee Registration Now Open Event Spans December 12th through 15th; Summit Sessions Are December 13th and 14th San…
Architectures for Matrix Extension in CPU | Jiang Zhao, Alibaba CloudRecent rapid development of various applications represented by Deep Learning (DL) calls for a much-needed increase in established chip matrix computing capability. Therefore, CPU manufacturers…
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How to run Ockam on RISC-V Linux | OckamIn this hands-on guide, we'll show how to cross compile a Rust example of Ockam for RISC-V Linux systems. We'll also see how to test…
NSITEXE DR1000C, a RISC-V based parallel processor IP with vector extension (DFP: Data Flow Processor) has been licensed for Renesas’ new RH850/U2B Automotive MCUs | NSITEXENSITEXE, Inc. (headquartered in Minato Ward, Tokyo, Japan; President and CEO: Yukihide Niimi; hereinafter “NSITEXE”) announced that the DR1000C, a RISC-V based parallel processor IP…
5 Talks on RISC-V Online Event | VeriestRISC-V is an open standard instruction set architecture (ISA) based on established reduced instruction set computer (RISC) principles. This development in the semiconductor market has…
Kneron’s RISC-V AI Chip Intends to Bring L1 and L2 Autonomy to “Any Vehicle” | Jake Hertz, All About CircuitsThe push for autonomous vehicles has seen a lot of momentum for 2021. Aiming to keep it going is a new AI chip from Kneron…
A RISC-V Simulator and Benchmark Suite for Designing and Evaluating Vector Architectures | Cristóbal Ramírez Lazo, César Alejandro Hernández, Oscar Palomar, Osman Sabri Unsal, Marco Antonio Ramírez, and Adrían CristalVector architectures lack tools for research. Consider the gem5 simulator, which is possibly the leading platform for computer-system architecture research. Unfortunately, gem5 does not have…
PiDRAM: A Holistic End-to-end FPGA-based Framework for Processing-in-DRAM | Ataberk Olgun, Juan Gómez Luna, Konstantinos Kanellopoulos, Behzad Salami, Hasan Hassan, Oğuz Ergin, and Onur MutluProcessing-using-memory (PuM) techniques leverage the analog operation of memory cells to perform computation. Several recent works have demonstrated PuM techniques in off-the-shelf DRAM devices. Since…
Andes Technology Issues GDR to Be Listed on Luxembourg | Andes TechnologiesAndes Technology (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099), a leading RISC-V CPU IP supplier, announced today that it successfully issued its overseas depositary receipts (GDR)…
Open Source RT-Thread IoT OS Becomes a Member of RISC-V! | RT-ThreadRT-Thread IoT OS, a leading open-source operating system platform for the Internet of Things (IoT), today announced it has joined RISC-V International, a global open…
Codasip Founder Karel Masařík Elected to RISC-V Technical Steering Committee | CodasipCodasip, the leading supplier of customizable RISC-V processor IP, today announced that Dr Karel Masařík, company founder responsible for the development of Codasip’s core technology,…
Women Of The C-Suite: Calista Redmond Of RISC-V On The Five Things You Need To Succeed As A Senior Executive | Charlie Katz, Authority MagazineAs a part of our interview series called “Women Of The C-Suite,” we had the pleasure of interviewing Calista Redmond. Calista Redmond is the CEO…
VLSI Design Careers | Maven Silicon, Semiconductor EngineeringWhy this segment of the market is so promising, and what you need to know to succeed in it. Our CEO's article 'VLSI Design Careers' published by Semiconductor…