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NeuralScale: Industry Leading General Purpose Programmable NPU Architecture based on RISC-V Blog

NeuralScale: Industry Leading General Purpose Programmable NPU Architecture based on RISC-V

AI and its diverse applications have seen significant increasing demand for AI computing in clouds…

abringazeJuly 6, 2021

A Process Independent Power Optimised Register File Architecture BlogWhat's New

A Process Independent Power Optimised Register File Architecture

Overview This white paper describes how low-power memory technology, originally designed for large, high density,…

Tony StansfieldJune 30, 2021

Wanxiang Blockchain Organized the First Public Activity of RISC-V Blockchain SIG with Partners BlogWhat's New

Wanxiang Blockchain Organized the First Public Activity of RISC-V Blockchain SIG with Partners

On June 24, during the RISC-V World Conference China 2021 hosted by ShanghaiTech University, Institute…

Wanxiang BlockchainJune 29, 2021

RISC: Open Hardware Blog

RISC: Open Hardware

Peggy and David Patterson, pardee professor of computer science, Emeritus, University of California at Berkeley,…

David PattersonJune 25, 2021

Embedded Programming and IoT – Memory Management Criticality! BlogWhat's New

Embedded Programming and IoT – Memory Management Criticality!

There are two types of IoT devices: high-end devices and low-end devices. The operating systems…

Tan RahmanJune 21, 2021

RISC-V SIG-HPC Enabling RISC-V in HPC, Supercomputers to the Edge, and Emerging AI/ML/DL HPC Workloads BlogWhat's New

RISC-V SIG-HPC Enabling RISC-V in HPC, Supercomputers to the Edge, and Emerging AI/ML/DL HPC Workloads

RISC-V was first deployed as a microcontroller or embedded processor. However, in the future, the…

John DavisJune 9, 2021

RISC-V RV32I RTL Architecture | Maven Silicon Blog

RISC-V RV32I RTL Architecture | Maven Silicon

This video explains the RTL architecture of an RV32I RISC-V processor. Also, it shows how…

Maven SiliconJune 7, 2021

The Zephyr Project Celebrates 5th Anniversary with new members and inaugural Zephyr Developer Summit on June 8-10 BlogWhat's New

The Zephyr Project Celebrates 5th Anniversary with new members and inaugural Zephyr Developer Summit on June 8-10

“RISC-V and Zephyr were both designed to drive innovation in the hardware space with open…

RISC-V Community NewsJune 4, 2021

Antmicro Open Source Portal launched BlogWhat's New

Antmicro Open Source Portal launched

Antmicro was founded on the belief that open source can dramatically accelerate technological progress by…

AntmicroJune 3, 2021

New Open Source Contributor Model: RISC-V Development Partners BlogWhat's New

New Open Source Contributor Model: RISC-V Development Partners

The growth of RISC-V is built on the collaborative efforts of the individuals and organizations…

Kim McMahonMay 28, 2021

Coming June 2 – RISC-V Developer Tools and Tool Chains Forum! Register now! BlogWhat's New

Coming June 2 – RISC-V Developer Tools and Tool Chains Forum! Register now!

The RISC-V Forums, hosted by RISC-V International, are short-form, single-topic, deep-dive virtual events. This is…

Kim McMahonMay 14, 2021

RISC-V RV32I Instructions Format | Maven Silicon BlogWhat's New

RISC-V RV32I Instructions Format | Maven Silicon

This video explains all RV 32I Instruction formats, R, I, S, B, J, and U…

Maven SiliconMay 13, 2021

seL4 on RISC-V Verified to Binary Code Blog

seL4 on RISC-V Verified to Binary Code

Author: Gernot Heiser, seL4 FoundationIn June 2020 we announced that the seL4 microkernel, the world’s…

Gernot HeiserMay 5, 2021

The world’s first DSP based on RISC-V ISA is about to be mass-produced Blog

The world’s first DSP based on RISC-V ISA is about to be mass-produced

RISC-V, the "youngest" ISA (Instruction Set Architecture), which was born in year 2010, has attracted…

Bao Yonggang(包永刚)May 3, 2021

RISC-V Developer Boards to drive innovation Blog

RISC-V Developer Boards to drive innovation

We are at an incredible inflection point for RISC-V. We are making history and we…

Mark HimelsteinApril 28, 2021

Bugs: A verification engineer’s dream, a designer’s nightmare Blog

Bugs: A verification engineer’s dream, a designer’s nightmare

This blog was originally published on the Axiomise website. Read the original blog. Who wants…

Ashish DarbariApril 19, 2021

RISC-V Application to Machine Language | Maven Silicon Blog

RISC-V Application to Machine Language | Maven Silicon

RISC-V Application to Machine Language March 17, 2021 Sivakumar P R This video explains how a…

Maven SiliconApril 8, 2021

Bringing the benefits of RISC-V and Renode to the Very Efficient Deep Learning in IoT project Blog

Bringing the benefits of RISC-V and Renode to the Very Efficient Deep Learning in IoT project

The EU-funded Very Efficient Deep Learning in IoT (VEDLIoT) project is underway. Launched at the…

abringazeMarch 31, 2021

Opening Up New Design Possibilities with OmniXtend Blog

Opening Up New Design Possibilities with OmniXtend

I am thrilled to see the announcement and initiation of collaboration between CHIPS Alliance and…

abringazeMarch 29, 2021

The Cybersecurity Pincushion and a Myriad of Tiny Threat Points Blog

The Cybersecurity Pincushion and a Myriad of Tiny Threat Points

“Large organizations are using over 130 tools on average. This is just massive!” - Matt…

abringazeMarch 25, 2021

Check out the new RISC-V Careers page and RISC-V Mentorship program! Blog

Check out the new RISC-V Careers page and RISC-V Mentorship program!

We are excited to announce the new RISC-V Careers page and RISC-V Mentorship program! As…

abringazeMarch 22, 2021

FOSSi Fever 2020 Blog

FOSSi Fever 2020

2020 was a year with a lot of bad news and so it feels slightly…

abringazeMarch 19, 2021

RISC-V Security Forum 2021 – Schedule Announced! Blog

RISC-V Security Forum 2021 – Schedule Announced!

The RISC-V Forums, hosted by RISC-V International, are short-form, single-topic, deep-dive virtual events. This is…

abringazeMarch 17, 2021

Growing an Open and Inclusive Community Blog

Growing an Open and Inclusive Community

Collaboration underpins everything we do in the RISC-V community. That’s why we encourage everyone to…

Kim McMahonMarch 9, 2021

RISC-V Execution Stages | Maven Silicon Blog

RISC-V Execution Stages | Maven Silicon

This video explains the execution stages of a RISC-V processor and how it executes all…

Maven SiliconMarch 5, 2021