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ESP32-C5 RISC-V IoT MCU supports dual-band WiFi 6, Bluetooth 5.0 LE | Jean-Luc Aufranc, CNX Software
RISC-V’s CTO on the Art of Herding Cats | Junko Yoshida, The Ojo – Yoshida ReportSipeed Lichee RV Dock Pro RISC-V SBC adds MIPI/RGB LCD connector, dual MIC, and BL702 JTAG+UART debugger | Jean-Luc Aufranc, CNX Software
SiFive Enhances Popular X280 Processor IP to Meet Accelerated Demand for Vector Processing | SiFive
Codasip Studio Mac extends potential to design for differentiation with RISC-V | Codasip
Think Silicon Shows Off First RISC-V 3D GPU | Michael Larabel, Phoronix
OpenHW Group Announces RISC-V-based CORE-V MCU Development Kit for IoT Built with Open-Source Hardware & Software | AIT News Desk, AIthority
Embedded World: RISC-V ratifies Efficient Trace and Supervisor Binary Interface | Steve Bush, Electronics Weekly
European RISC-V chip for IoT development kit | Nick Flaherty , EENews Europe
Ashling and Embecosm partnership continues to provide “best-in-class” embedded tools services and solutions to the RISC-V market | BusinessWire
CV32E40P Core From OpenHW Group Sets the RISC-V Quality Standard For Open-Source Hardware IP | Imperas Software Ltd.
Democratizing Chiplet-Based Processor Design | Ventana Micro Systems
CHERI Software Release for Summer 2021 | George Neville-Neil, Light Blue TouchpaperSiPearl opens design centre in Grenoble, looks for 50 engineers | Nick Flaherty, EE News Europe
Calculating the big picture: Future HPC efforts will soon see off its von Neumann past | Rupert Goodwins, The Register
A Heterogeneous RISC-V Processor for Efficient DNN Application in Smart Sensing System | Haifeng Zhang, Xiaoti Wu, Yuyu Du, Hongqing Guo, Chuxi Li, Yidong Yuan, Meng Zhang and Shengbing Zhang
RISC-V: The New Architecture on the Block | Klara SystemsSiPearl opens design centre in Grenoble, looks for 50 engineers | Nick Flaherty, EE News Europe
IoT Use Cases Based on Telink TLSR9 Series RISC-V Connectivity SoC | Telink Semiconductor, RISC-V Con ChinaThe RISC-V BL602 Book | Lee Lup Yuen
MicroZed Chronicles: Bluespec RISC-V | Adam Taylor, Adiuvo Engineering and Training, LTD.
Esperanto Technologies on Accelerating Machine Learning | Dave Ditzel, Hot Chips 33
Security Enclave IP Based on RISC-V | Silex Insight
RVSoC Project: A Portable and Linux Capable RISC-V Computer System on an FPGA | Arch Lab, Tokyo Tech
ESP32-C5 RISC-V IoT MCU supports dual-band WiFi 6, Bluetooth 5.0 LE | Jean-Luc Aufranc, CNX SoftwareEspressif Systems ESP32-C5 is an upcoming wireless RISC-V microcontroller for IoT applications that supports dual-band (2.4 & 5.0 GHz) WiFi 6 connectivity as well as…
RISC-V’s CTO on the Art of Herding Cats | Junko Yoshida, The Ojo – Yoshida ReportThe measure of success for an open-source community such as RISC-V can be memberships, number of shipped products or revenues generated by its member companies.…
Sipeed Lichee RV Dock Pro RISC-V SBC adds MIPI/RGB LCD connector, dual MIC, and BL702 JTAG+UART debugger | Jean-Luc Aufranc, CNX SoftwareSipeed has launched the Lichee RV Dock Pro kit for the company’s Lichee RV Allwinner D1 RISC-V module that builds on the earlier Lichee RV…
SiFive Enhances Popular X280 Processor IP to Meet Accelerated Demand for Vector Processing | SiFiveSiFive Inc., the founder and leader of RISC-V computing, today announced the release of the latest version of its SiFive® Intelligence™ X280 processor, which introduces…
Codasip Studio Mac extends potential to design for differentiation with RISC-V | CodasipCodasip, the leader in customizable RISC-V processor IP, today announced that its Codasip Studio platform is now available to support Apple macOS Monterey (the current…
Think Silicon Shows Off First RISC-V 3D GPU | Michael Larabel, PhoronixAt the Embedded World conference happening this week in Nürnberg, Think Silicon is showing off the first production RISC-V 3D GPU design. The Think Silicon…
OpenHW Group Announces RISC-V-based CORE-V MCU Development Kit for IoT Built with Open-Source Hardware & Software | AIT News Desk, AIthorityOpenHW Group and its members announced one of the industry’s most comprehensive open-source RISC-V Development Kits, featuring the OpenHW CORE-V MCU, the CORE-V software developer…
Embedded World: RISC-V ratifies Efficient Trace and Supervisor Binary Interface | Steve Bush, Electronics WeeklyAt Embedded World this morning, RISC-V International announced approval of its E-Trace (Efficient Trace for Risc-V) and SBI (RISC-V supervisor binary interface) specifications. E-Trace defines…
European RISC-V chip for IoT development kit | Nick Flaherty , EENews EuropeThe OpenHW Group has launched an open-source RISC-V Development Kit based around the European CORE-V microcontroller and an open printed circuit board (PCB) design that…
Ashling and Embecosm partnership continues to provide “best-in-class” embedded tools services and solutions to the RISC-V market | BusinessWireAshling, a supplier of high-performance embedded software and hardware tools for the RISC-V market and Embecosm the leading supplier of RISC-V free and Open-source Compiler…
CV32E40P Core From OpenHW Group Sets the RISC-V Quality Standard For Open-Source Hardware IP | Imperas Software Ltd.Imperas Software Ltd., the leader in RISC-V simulation solutions, congratulates the OpenHW Group on the announcement of the CORE-V MCU Dev/Kit project based on the high-quality CV32E40P open-source…
Democratizing Chiplet-Based Processor Design | Ventana Micro SystemsBy Bob Wheeler, Principal Analyst, The Linley Group Chiplet-based designs promise reduced development costs and faster time to market, but they’ve been exclusive to large…
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CHERI Software Release for Summer 2021 | George Neville-Neil, Light Blue TouchpaperThe CHERI project at SRI International and the University of Cambridge are pleased to announce our second CHERI reference software-stack release. The release supports the…
SiPearl opens design centre in Grenoble, looks for 50 engineers | Nick Flaherty, EE News EuropeSiPearl has opened a design centre in Grenoble with the goal of recruiting 50 engineers on the site by the end of 2022. The company…
Calculating the big picture: Future HPC efforts will soon see off its von Neumann past | Rupert Goodwins, The RegisterHigh-performance computing (HPC) has a very different dynamic to the mainstream. It enables classes of computation of strategic importance to nation states and their agencies,…
A Heterogeneous RISC-V Processor for Efficient DNN Application in Smart Sensing System | Haifeng Zhang, Xiaoti Wu, Yuyu Du, Hongqing Guo, Chuxi Li, Yidong Yuan, Meng Zhang and Shengbing ZhangAbstract Extracting features from sensing data on edge devices is a challenging application for which deep neural networks (DNN) have shown promising results. Unfortunately, the…
RISC-V: The New Architecture on the Block | Klara SystemsThe majority of people in the tech community are well aware of the two main chip architectures: x86 and ARM. Each has its own strengths…
SiPearl opens design centre in Grenoble, looks for 50 engineers | Nick Flaherty, EE News EuropeSiPearl has opened a design centre in Grenoble with the goal of recruiting 50 engineers on the site by the end of 2022. The company…
IoT Use Cases Based on Telink TLSR9 Series RISC-V Connectivity SoC | Telink Semiconductor, RISC-V Con ChinaHear the latest news from Telink and Andes Technologies on IoT use cases based on the Telink TLSR9 series RISC-V SoC. Read the full presentation.
The RISC-V BL602 Book | Lee Lup YuenFind out what’s inside the BL602 / BL604 System-on-a-Chip (SoC)… And why it’s unique among the microcontrollers we’ve seen. Read the full tutorial.
MicroZed Chronicles: Bluespec RISC-V | Adam Taylor, Adiuvo Engineering and Training, LTD.There are several FPGA use cases where a softcore processor is beneficial to the overall solution. These can include anything from performing simple communication and…
Esperanto Technologies on Accelerating Machine Learning | Dave Ditzel, Hot Chips 33Watch the full presentation by Dave Ditzel, Chairman and Founder of Esperanto Technologies, on “Accelerating ML Recommendation with over a Thousand RISC-V/Tensor Processors on Esperanto’s…
Security Enclave IP Based on RISC-V | Silex InsightRead the full educational brochure from Silex Insights on security enclave IP based on RISC-V.
RVSoC Project: A Portable and Linux Capable RISC-V Computer System on an FPGA | Arch Lab, Tokyo TechThe RVSoC Project is a research and development project of the RISC-V computer system targeting FPGAs in Verilog HDL at Arch Lab, Tokyo Tech. RVSoC…