No recent posts listed
Join us in the classroom! Put RISC-V into your Computer Architecture course using RVfpga! | Robert C.W. Owen, Imagination Technologies
Alibaba Cloud Tops MLPerf Tiny v0.7 Benchmark | Alibaba CloudXuantie IOMMU from T-Head for RISC-V | Chong Ren, Alibaba Cloud
Mi-V Ecosystem Partner Solutions | Leah Iris, MicrochipXuanTie VirtualZone: RISC-V-based Security Extensions | Xuan Jian, Alibaba Cloud
HPCwire‘s People to Watch Program | HPCWire
MIPS Chooses Ashling’s RiscFree™ Toolchain for its RISC-V ISA Compatible IP Cores | Ashling and MIPS, BusinessWire
RISC-V is coming to the internet of things | Stacey Higginbotham, Stacey on IoT
SEGGER releases new Embedded Studio for RISC-V with hard real-time C++ support | SEGGER, Electronic Engineering Journal
RISC-V Gets Sv57-Based Virtual Memory, Other Improvements For Linux 5.18 | Michael Larabel, Phoronix
Now the V in RISC-V Stands for VROOM! | Matthew Carlson, Hackaday
Dongshan Nezha STU devkit features Allwinner D1 RISC-V SoM/SBC | Jean-Luc Aufranc, CNX Software
PUFiot – An Essential Security Coprocessor for RISC-V Designs | Sam Chung, Embedded Computing Design
Mikron MIK32 – Made in Russia 32-bit RISC-V MCU offers features similar to STM32L0 MCU | Jean-Luc Aufranc, CNX Software
Intro to the Microchip FPGA and SoC-Based RISC-V Ecosystem | Alex Pluemer, Mouser Electronics
Supporting CUDA for an extended RISC-V GPU architecture | Ruobing Han, Blaise Tine, Jaewon Lee, Jaewoong Sim, Hyesoon Kim
Fun with Open Source Semis | Jonathan Goldberg, Digits to Dollars
Coffee disease classification with ML | João Vitor Yukio Bordin Yamashita, Hackster.ioVideo: Low-Power License Plate Detection and Recognition on a RISC-V Multi-Core MCU-based Vision System | Lorenzo Lamberti, EMEA 2021 Student Forum
Andes Technology Corp. Brings Its Broad Family of RISC-V CPU IP to the Silicon Catalyst Semiconductor Incubator | Design and Reuse
Tech giants are rushing to develop their own chips — here’s why | Sam Shead, CNBC
Nvidia CUDA Software Gets Ported to Open-Source RISC-V GPGPU Project | Aleksandar Kostovic , Tom’s Hardware
RISC-V Gains Traction in the Data Center | Jake Hertz, All About CircuitsAll the Polynomial Multiplication You Need on RISC-V | Hwajeong Seo, Hyeokdong Kwon, Siwoo Eum, Kyungbae Jang, Hyunjun Kim, Hyunji Kim, Minjoo Sim, Gyeongju Song, and Wai-Kong Lee
Join us in the classroom! Put RISC-V into your Computer Architecture course using RVfpga! | Robert C.W. Owen, Imagination TechnologiesDear Professors and Friends, Online is convenient and it has saved us during the pandemic, but you can't beat in-person class! That immersive feeling of…
Alibaba Cloud Tops MLPerf Tiny v0.7 Benchmark | Alibaba CloudAlibaba Cloud’s Xuantie C906 processor attained firsts in the most recent findings from MLPerf Tiny v0.7, an AI benchmark focusing on IOT devices. The Xuantie…
Xuantie IOMMU from T-Head for RISC-V | Chong Ren, Alibaba CloudThe recent development of the RISC-V IOMMU effort has attracted substantial attention from the RISC-V community. Xuantie IOMMU from T-Head Semiconductors of Alibaba Group, holding…
Mi-V Ecosystem Partner Solutions | Leah Iris, MicrochipThe Mi-V RISC-V ecosystem is a continuously expanding, comprehensive suite of tools and design resources developed by Microchip and numerous third parties to fully support…
XuanTie VirtualZone: RISC-V-based Security Extensions | Xuan Jian, Alibaba CloudIntroduction Among many new things in the 21st century, internet and IoT have been one of the most significant human advancements. As fast-paced and accelerating…
HPCwire‘s People to Watch Program | HPCWire2022 marks the 20th year of HPCwire‘s People to Watch Program, which recognizes HPC professionals who play leading roles in driving innovation within their particular fields,…
MIPS Chooses Ashling’s RiscFree™ Toolchain for its RISC-V ISA Compatible IP Cores | Ashling and MIPS, BusinessWireAshling and MIPS announced today that Ashling’s RiscFree™ Toolchain has been extended to support MIPS RISC-V ISA based IP cores. RiscFree™ is Ashling’s Integrated Development Environment (IDE) including a…
RISC-V is coming to the internet of things | Stacey Higginbotham, Stacey on IoTFans of this newsletter know I’m a major chip nerd. I started my tech career as a semiconductor reporter, and for the last seven or…
SEGGER releases new Embedded Studio for RISC-V with hard real-time C++ support | SEGGER, Electronic Engineering JournalSEGGER’s Embedded Studio for RISC-V, Version 6, now uses real-time memory management which improves efficiency and response time when allocating and freeing up memory, satisfying requirements…
RISC-V Gets Sv57-Based Virtual Memory, Other Improvements For Linux 5.18 | Michael Larabel, PhoronixThe RISC-V CPU architecture updates have landed for the in-development Linux 5.18 kernel. Notable with the RISC-V additions for Linux 5.18 is sv57 support for 5-level page tables.…
Now the V in RISC-V Stands for VROOM! | Matthew Carlson, HackadayHundreds of variations of open-source CPUs written in an HDL seem to float around the internet these days (and that’s a great thing). Many are…
Dongshan Nezha STU devkit features Allwinner D1 RISC-V SoM/SBC | Jean-Luc Aufranc, CNX SoftwareDongshan Nezha STU is a development kit comprised of an Allwinner D1 RISC-V system-on-module (SoM) and a carrier board with three 40-pin headers to access…
No recent posts listed
No recent posts listed
No recent posts listed
No recent posts listed
PUFiot – An Essential Security Coprocessor for RISC-V Designs | Sam Chung, Embedded Computing DesignThe number of connected IoT devices exceeded 46 billion in 2021 and is expected to reach a remarkable 125 billion by 2030. This will shift…
Mikron MIK32 – Made in Russia 32-bit RISC-V MCU offers features similar to STM32L0 MCU | Jean-Luc Aufranc, CNX SoftwareThe Mikron MIK32 is a 32-bit RISC-V microcontroller made in Russia with features similar to an STMicro STM32L0 Cortex-M0+ MCU that shows how RISC-V open-source…
Intro to the Microchip FPGA and SoC-Based RISC-V Ecosystem | Alex Pluemer, Mouser ElectronicsRISC-V is a reduced ISA (instruction set architecture) designed for scalability and versatility in a wide range of applications and use cases. RISC-V is rapidly…
Supporting CUDA for an extended RISC-V GPU architecture | Ruobing Han, Blaise Tine, Jaewon Lee, Jaewoong Sim, Hyesoon KimABSTRACTWith the rapid development of scientific computation, more and more researchers and developers are committed to implementing various workloads/operations on different devices. Among all these…
Fun with Open Source Semis | Jonathan Goldberg, Digits to DollarsDig a little into RISC-V and all sorts of fun things start to pop up. There is a tremendous amount of experimentation taking place around…
Coffee disease classification with ML | João Vitor Yukio Bordin Yamashita, Hackster.ioAccording to the International Coffee Organization, Brazil is the world's largest coffee producer and this is an important commodity for the country. Identify and treat…
Video: Low-Power License Plate Detection and Recognition on a RISC-V Multi-Core MCU-based Vision System | Lorenzo Lamberti, EMEA 2021 Student ForumWatch Lorenzo Lamberti (PhD student, University of Bologna, Italy) present on Low-Power License Plate Detection and Recognition on a RISC-V Multi-Core MCU-based Vision System at…
Andes Technology Corp. Brings Its Broad Family of RISC-V CPU IP to the Silicon Catalyst Semiconductor Incubator | Design and ReuseAndes Technology Corporation (TWSE: 6533), a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and Founding Premier member of RISC-V International, today announced…
Tech giants are rushing to develop their own chips — here’s why | Sam Shead, CNBCNot content with relying on standard chips that are in high demand, some of the world’s biggest tech firms are developing their own semiconductors. Apple,…
Nvidia CUDA Software Gets Ported to Open-Source RISC-V GPGPU Project | Aleksandar Kostovic , Tom’s HardwareRISC-V has been one of the hottest topics in the world of computing, as the Instruction Set Architecture (ISA) allows for extensive customization and is…
RISC-V Gains Traction in the Data Center | Jake Hertz, All About CircuitsRISC-V is often associated with embedded projects. Now, the open-source ISA may be a more common player in higher-end computing markets. Founded in a UC…
All the Polynomial Multiplication You Need on RISC-V | Hwajeong Seo, Hyeokdong Kwon, Siwoo Eum, Kyungbae Jang, Hyunjun Kim, Hyunji Kim, Minjoo Sim, Gyeongju Song, and Wai-Kong LeeRead the full paper. Abstract: Polynomial multiplication is a core operation for public key cryptography, such as pre-quantum cryptography (e.g. elliptic curve cryptography) and post-quantum…