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RISC-V Star Rising from the East – Introducing StarFive

With the recent announcement of BeagleVTM, reported by premium technology media Ars Technica, Tom’s Hardware,…

Chloe MaMarch 1, 2021

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RISC-V growth and successes in technology and industry : embedded world 2021

RISC-V International has more than 1,000 members across over 50 countries who are working in…

Kim McMahonMarch 1, 2021

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OpenHW Group highlights how verification is a key aspect of the open-source CORE-V processor IP

The RISC-V ISA (Instruction Set Architecture) permits a range of possibilities for processor implementation with…

Kevin McDermottFebruary 23, 2021

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RISC-V Becoming Less Risky with the Right Verification

RISC-V continues to make headlines across the electronic design industry. You may have seen the…

Rob van BlommesteinFebruary 12, 2021

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High-throughput open source PCIe on Xilinx VU19P-based ASIC prototyping platform

Originally published by Antmicro In the daily work at Antmicro, they use FPGAs primarily…

AntmicroFebruary 11, 2021

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Hardware Description Language Chisel & Diplomacy Deeper dive

Are you using Chisel? A hardware building language based on Scala. Not a high-level synthesis…

Akira TsukamotoFebruary 5, 2021

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Where to start with RISC-V

Originally posted on Medium How to get started, where to contribute, and what to do…

Rhys DaviesJanuary 29, 2021

Blog Blog (Japanese)

Overview of Diplomacy for writing effective hardware design language Chisel (Japanese)

ハードウェア記述言語Chiselをもっともっと活用するためのDiplomacy概説発表者：msyksphinz (FPGA開発日記著者) @msyksphinz_dev https://msyksphinz.hatenablog.com Chisel使ってますか？ Scalaをベースとしたハードウェア構築言語. 高位合成言語ではない SiFiveのRISC-V IPで採用されている Rocket-Chip : https://github.com/chipsalliance/rocket-chip BOOM : https://github.com/riscv-boom/riscv-boom Chiselの基礎…

Akira TsukamotoJanuary 21, 2021

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RISC-V CPU Performance | Maven Silicon

This video explains how Maven Silicon measures the CPU performance and how we try to…

Maven SiliconJanuary 20, 2021

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Let’s Make RISC-V Connected Systems Synonymous with Security

This blog was submitted by Silex Insight. If you are designing systems based on…

Jon JacobsenJanuary 6, 2021

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RISC-V Microarchitecture for Kids??!! | Steve Hoover, Redwood EDA

Last month I had the great pleasure of sharing a blog post about Nicholas Sharkey,…

Steve HooverDecember 15, 2020

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What is Processor Core Complexity?

This blog was originally published on the Codasip blog. The more complex a processor…

Roddy UrquhartNovember 29, 2020

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What is Needed to Support an Operating System?

This blog was originally published on the Codasip blog. For each embedded product, software…

Roddy UrquhartNovember 25, 2020

Blog

Understanding the Performance of Processor IP Cores

This blog was originally published on the Codasip blog. Looking at any processor IP,…

Roddy UrquhartNovember 23, 2020

Blog

RPC DRAM support in open source DRAM controller

Original content published October 28, 2020 on the Antmicro blog. The Internet of Things is…

AntmicroNovember 18, 2020

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13-Year-Old, Nicholas Sharkey, Creates a RISC-V Core

One of my great pleasures operating my EDA startup, Redwood EDA, is working with enthusiastic…

Steve HooverNovember 13, 2020

Blog

PicoRio: the Raspberry Pi-like Small-Board Computer for RISC-V

By Zhangxi Tan, Lin Zhang, Yi Li, and David Patterson of the RISC-V International Open…

RISC-V International Open Source Laboratory Tsinghua-Berkeley Shenzhen InstituteNovember 12, 2020

Blog

Open Source Digital Library in HPC

This post was originally published on the MEEP (MareNostrum Exascale Emulation Platform) website. John Davis,…

John DavisNovember 10, 2020

Blog

PolarFire SoC and RISC-V

A bit of history Both Microchip (through its acquisition of Microsemi) and Antmicro got on…

AntmicroNovember 9, 2020

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Third Workshop on RISC-V Activities – It’s the ecosystem!

RISC-V Community NewsNovember 2, 2020

Blog Proceedings & Reports

RISC-V Global Forum 2020 Transparency Report

Click to read the full RISCV GlobalForum 2020 Transparency Report]]>

Kim McMahonOctober 29, 2020

Blog

Move fast and break things? Not so fast in embedded.

Written by Shawn Prestridge, Industry profile and Senior Field Application Engineer/Team Leader for US FAEs…

Shawn PrestridgeOctober 12, 2020

Blog

Maven Silicon – a RISC-V Training Partner

This blog was orginally published on the Maven Silicon blog. RISC-V has accepted Maven Silicon…

Sivakumar P ROctober 2, 2020

RISC-V

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RISC-V: Standing on the Shoulders of Giants

RISC-V is officially a decade old. Here’s a look at what the organization has accomplished…

Mark HimelsteinOctober 1, 2020

Blog

RISC-V: A Playground for Game-changing Design Methodologies

I attended the RISC-V Global Forum on September 3, 2020. I must say, the pandemic…

Shivam PotdarSeptember 30, 2020

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