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Dustin: A 16-Cores Parallel Ultra-Low-Power Cluster with 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode | Gianmarco Ottavi∗ , Angelo Garofalo∗ , Giuseppe Tagliavini† , Francesco Conti∗ , Alfio Di Mauro‡ , Luca Benini∗‡, and Davide Rossi∗ ∗Department of Electrical, Electronic and Information Engineering (DEI), University of Bologna, Italy †Department of Computer Science and Engineering (DISI), University of Bologna, Italy ‡ IIS Integrated Systems Laboratory, ETH Zurich, Switzerland
WCH CH32V307 RISC-V development board features 8 UART ports controlled over Ethernet | Jean-Luc Aufranc, CNX Software
SmartDV and NSITEXE Sign Agreement to Deploy NSITEXE’s RISC-V 32bit CPU Core throughout North America, China, India, Taiwan | SmartDV
Andes RISC-V SoC shipments top 3 billion units in 2021 | Julian Ho, DigiTimes
Imagination GPU cleared for RISC-V CPU compatibility, licensed to chip designers | Agam Shah, The Register
Alibaba Cloud Opens Up IoT Technology Development Platform | Wang Cindy, Alibaba Cloud
RISC-V security IP for chiplet die-to-die communication | Nick Flaherty, EE News Europe
RISC-V SoCs: Powering Embedded Computing | EfinixFull-Stack Open-Source – T-Head Promotes the Maturity of RISC-V Technology | Alibaba Cloud, Apsara News
Introduction to FPGA Part 11 – RISC-V Softcore Processor | Digi-Key Electronics
Introducing an Open Source Microkernel OS for AIoT | Blues Lin, RT-Thread
Take Control of Your RISC-V Codebase | Rafael Taubinger, Electronic Design
RISC-V Chip Delivers Quantum-Resistant Encryption | Charles Q. Choi, IEEE Spectrum
Working With RISC-V | Ed Sperling, Semiconductor EngineeringRISC-V Wireless Chip With Adaptive Body Bias Reaches pW power | Nick Flaherty, EE News EuropeXDIVINSA: eXtended DIVersifying INStruction Agent to Mitigate Power Side-Channel Leakage | Thinh H. Pham, Ben Marshall, Alexander Fell, Siew-Kei Lam, and Daniel Page, Cryptology
RISC-V CEO: The biggest opportunity to change computing since the 1980s | Tiernan Ray, ZDNetRolf Segger on the chip shortage | Nick Flaherty , EE News EuropeSecure FPGA RISC-V SoC Forgoes Heatsink | William G. Wong, Electronic Design
SEGGER Releases Floating Point Library to Support RISC-V | Raspberry Pi Projects
Mythic Licenses Codasip’s L30 RISC-V Core for Next-Generation AI Processor |
Researchers Develop RISC-V Chip for Quantum-Resistant Encryption | Francisco Pires, Tom’s Hardware
TUM Researchers Design Chip for ‘Post Quantum’ Cryptography | John Russell, HPC WireVideo: Booting the HiFive Unmatched board | Gábor Samu
Dustin: A 16-Cores Parallel Ultra-Low-Power Cluster with 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode | Gianmarco Ottavi∗ , Angelo Garofalo∗ , Giuseppe Tagliavini† , Francesco Conti∗ , Alfio Di Mauro‡ , Luca Benini∗‡, and Davide Rossi∗ ∗Department of Electrical, Electronic and Information Engineering (DEI), University of Bologna, Italy †Department of Computer Science and Engineering (DISI), University of Bologna, Italy ‡ IIS Integrated Systems Laboratory, ETH Zurich, SwitzerlandAbstract— Computationally intensive algorithms such as Deep Neural Networks (DNNs) are becoming killer applications for edge devices. Porting heavily data-parallel algorithms on resource-constrained and battery-powered…
WCH CH32V307 RISC-V development board features 8 UART ports controlled over Ethernet | Jean-Luc Aufranc, CNX SoftwareCH32V307V-EVT-R1 is a development board based on WCH CH32V307 RISC-V microcontroller with an Ethernet port, an USB Type-C port, and eight UART interfaces accessible through…
SmartDV and NSITEXE Sign Agreement to Deploy NSITEXE’s RISC-V 32bit CPU Core throughout North America, China, India, Taiwan | SmartDVHigh-Reliability, General-Purpose CPU Based on 32-Bit RISC-V ISA Supports ISO 26262 ASIL D Requirement for Automotive Applications. SmartDV™ Technologies, the leading supplier of Design and…
Andes RISC-V SoC shipments top 3 billion units in 2021 | Julian Ho, DigiTimesShipments for SoC chips adopting Andes Technology's processor IPs topped three billion units in 2021, representing a 2017-2021 CAGR of 50%, according to Frankwell Lin,…
Imagination GPU cleared for RISC-V CPU compatibility, licensed to chip designers | Agam Shah, The RegisterIt seems we're a step closer to system-on-chips containing a mix of RISC-V CPU cores and a mainstream GPU powering Linux devices and the like.…
Alibaba Cloud Opens Up IoT Technology Development Platform | Wang Cindy, Alibaba CloudAlibaba Cloud, the digital technology and intelligence backbone of Alibaba Group, announced it has opened the source code of Yun on Chip (YoC), its proprietary…
RISC-V security IP for chiplet die-to-die communication | Nick Flaherty, EE News EuropeCeva’s Fortrix RISC-V-based SecureD2D IP enables secure authentication and firmware boot/code load between chiplets in a heterogeneous system-on-chip. Ceva has launched security IP that protects…
RISC-V SoCs: Powering Embedded Computing | EfinixRISC-V is an open-source standard instruction set architecture (ISA) that is managed by the non-profit RISC-V Foundation. This modular ISA has a base instruction set and…
Full-Stack Open-Source – T-Head Promotes the Maturity of RISC-V Technology | Alibaba Cloud, Apsara NewsOn October 19, 2021, at the 2021 Apsara Conference, Zhang Jianfeng, President of Alibaba Cloud Intelligence, announced that T-Head has made the XuanTie RISC-V series…
Introduction to FPGA Part 11 – RISC-V Softcore Processor | Digi-Key ElectronicsA field-programmable gate array (FPGA) is an integrated circuit (IC) that lets you implement custom digital circuits. You can use an FPGA to create optimized…
Introducing an Open Source Microkernel OS for AIoT | Blues Lin, RT-ThreadRT-Thread engineer has given a presentation to introduce RT-Thread Smart, an open-source MicroKernel OS. RT-Thread Smart is positioned as a professional, high-performance, micro-kernel operating system…
Take Control of Your RISC-V Codebase | Rafael Taubinger, Electronic DesignWhen we talk about take control of your RISC-V codebase, there are really two aspects to it. The first meaning is reusing your codebase for…
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RISC-V Chip Delivers Quantum-Resistant Encryption | Charles Q. Choi, IEEE SpectrumMany new encryption techniques seek to resist powerful attacks that could be done using future quantum computers, but these methods often require enormous processing power.…
Working With RISC-V | Ed Sperling, Semiconductor EngineeringRISC-V is coming on strong, but working with this open-source processor core isn’t as simple as plugging in a commercial piece of IP. Zdenek Prikryl,…
RISC-V Wireless Chip With Adaptive Body Bias Reaches pW power | Nick Flaherty, EE News EuropeResearchers in Switzerland and Japan have developed a RISC-V wireless system on chip with anactive power consumption as low as 10µA and an ultra low…
XDIVINSA: eXtended DIVersifying INStruction Agent to Mitigate Power Side-Channel Leakage | Thinh H. Pham, Ben Marshall, Alexander Fell, Siew-Kei Lam, and Daniel Page, CryptologySide-channel analysis (SCA) attacks pose a major threat to embedded systems due to their ease of accessibility. Realising SCA resilient cryptographic algorithms on embedded systems…
RISC-V CEO: The biggest opportunity to change computing since the 1980s | Tiernan Ray, ZDNetCalista Redmond, chief executive of the microprocessor consortium RISC-V International, is a fan of the wild days of chip competition back in the 1980s. "This…
Rolf Segger on the chip shortage | Nick Flaherty , EE News EuropeRolf Segger, founder of Segger Microcontroller, talks to Nick Flaherty at eeNews Europe about the chip shortage, RISC-V, China and the need for embedded security…
Secure FPGA RISC-V SoC Forgoes Heatsink | William G. Wong, Electronic DesignVery-low-power FPGAs have been around for a while, but often there’s the need for those that can handle high-speed serial interfaces like PCI Express or…
SEGGER Releases Floating Point Library to Support RISC-V | Raspberry Pi ProjectsSEGGER‘s stand-alone Floating-Point Library has now been extended to include an assembly-optimized variant for RISC-V implementations. The library contains a complete set of high level…
Mythic Licenses Codasip’s L30 RISC-V Core for Next-Generation AI Processor |Codasip, the leading supplier of customizable RISC-V® embedded processor IP, announced today that Mythic, the pioneering AI processor company with breakthrough analog compute-in-memory technology, has…
Researchers Develop RISC-V Chip for Quantum-Resistant Encryption | Francisco Pires, Tom’s HardwareA research team with the Technical University of Munich (TUM) have designed a quantum cryptography chip aimed at the security demands of the quantum computing revolution. The…
TUM Researchers Design Chip for ‘Post Quantum’ Cryptography | John Russell, HPC WireResearchers from the Technical University of Munich (TUM) have designed and commissioned fabrication of chip intended to implement so-called post-quantum cryptography. The ASIC’s design is…
Video: Booting the HiFive Unmatched board | Gábor SamuSee Gábor Samu booting Ubuntu 21.04 on the SiFive HiFive Unmatched developer board. This was captured via the onboard serial port. Visit his blog for…