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Выпущена первая партия российского RISC-V микроконтроллера “МК32 АМУР” | Sergey Karasev, Server News
Plumerai develops embedded AI accelerator IP core for FPGAs | Nick Flaherty, EENews Europe
QEMU 6.2 On The Way With SGX For VMs, Apple Silicon, More RISC-V | Michael Larabel, Phoronix
Renesas RH850/U2B automotive SoC features RISC-V-based parallel co-processor | Jean-Luc Aufranc, CNX Software
SiFive Shepherds RISC-V ISA to Enterprise Applications, Broader Adoption | SiFive
Changing the Game With RISC-V ISA | Telink StaffWinnerMicro W806 240 MHz MCU finds it way into a $2 development board | Jean-Luc Aufranc, CNX Software
A Novel Twist: Maxim Integrated Removes Risk of RISC-V with a Dual-Core Arm/RISC-V Microcontroller | Bill Giovino, Digi-Key
We Hope to See You at Intel® FPGA Technology Day 2021 | Alexa Labadie, Intel
SELENE Hardware Platform First Release | SELENE H2020 Project
建構基於RISC-V的MCU「芯」生態 | 作者 : 顧正書，EE Times China
How to run Ockam on RISC-V Linux | Ockam
Alibaba’s chip unit realizes key breakthroughs with Xuantie CPU | Global Times
RISC-V could be coming to supercomputers (eventually) | Brad Linder, liliputing
European Processor Initiative Tapes Out Their First RISC-V Test Chip | Robin Mitchell, ElectroPages
RISC-V boffins lay out a plan for bringing the architecture to high-performance computing | Gareth Halfacree, The Register
Cortus Develops Next Generation High-End RISC-V CPU Core for HPC
RISC-V Evolving to Address Supercomputers and AI | Anton Shilov, Tom’s Hardware
Video: Let’s build a custom RISCV64 Unmatched Linux kernel! | More Bits Inside, Rene Rebe
Rebooting Imagination: A Heterogeneous Compute Strategy | Nitin Dahad, EE Times
Advanced Computing Systems Research Project Seeks Collaboration | Tactical Computing Labs
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Выпущена первая партия российского RISC-V микроконтроллера “МК32 АМУР” | Sergey Karasev, Server NewsКомпания «Микрон» сообщила о выпуске экспериментальной партии первого полностью российского микроконтроллера на открытой архитектуре RISC-V. Изделие под названием «МК32 АМУР» поможет снизить зависимость от иностранной…
Plumerai develops embedded AI accelerator IP core for FPGAs | Nick Flaherty, EENews EuropeThe Ikva IP core from Plumerai uses a RISC-V processor for embedded Binarised Neural Networks running a person detection model on a Lattice FPGA. London-based…
QEMU 6.2 On The Way With SGX For VMs, Apple Silicon, More RISC-V | Michael Larabel, PhoronixThis week marked the release of QEMU 6.2-rc0 as the first test candidate for this upcoming update that plays an important role in the open-source…
Renesas RH850/U2B automotive SoC features RISC-V-based parallel co-processor | Jean-Luc Aufranc, CNX SoftwareRenesas Electronics RH850/U2B is an automotive SoC designed for electronic control unit (ECU) with used for hybrid ICE and xEV traction inverter, high-end zone control,…
SiFive Shepherds RISC-V ISA to Enterprise Applications, Broader Adoption | SiFiveRead the full 451 Research note on SiFive and our RISC-V-based product families, here.
Changing the Game With RISC-V ISA | Telink StaffAs the world’s first open-source processor architecture, RISC-V could eliminate costly licenses, kickstart new innovation, and improve global partnerships across the developer community. RISC-V (pronounced…
WinnerMicro W806 240 MHz MCU finds it way into a $2 development board | Jean-Luc Aufranc, CNX SoftwareI’ve just been notified about an inexpensive board (HLK-W806) based on WinnerMicro W806 32-bit XT804 (XuanTie E804) microcontroller clocked at up to 240 MHz and…
A Novel Twist: Maxim Integrated Removes Risk of RISC-V with a Dual-Core Arm/RISC-V Microcontroller | Bill Giovino, Digi-KeyWhile Arm cores have proven themselves reliable and are now in most mobile devices and Internet of Things (IoT) endpoints, it’s always both useful and reassuring to…
We Hope to See You at Intel® FPGA Technology Day 2021 | Alexa Labadie, IntelIntel® FPGA Technology Day (IFTD) is a free four-day event that will be hosted virtually across the globe in North America, China, Japan, EMEA, and…
SELENE Hardware Platform First Release | SELENE H2020 ProjectThis repository holds the SELENE hardware platform. Remember to clone this repository recursively, as interconnect/axi and interconnect/common_cells are submodules. To simulate the SoC and/or generate…
建構基於RISC-V的MCU「芯」生態 | 作者 : 顧正書，EE Times China最近大學、研究機構、晶片廠商和網際網路巨頭紛紛採用和支持RISC-V這一有希望與Arm抗衡的指令集架構(ISA)…儘管建構RISC-V MCU的生態面臨很多挑戰，但巨大的發展潛力值得嘗試，只要RISC-V社群和廠商願意協作，一定能開創出RISC-V的一片「芯」天地。 據權威市調機構預測，2021年全球微控制器(MCU)市場總銷售額預計可達190億美元，出貨量超過250億顆。從2021~2028年，MCU年複合成長率(CAGR)約為10%，到2028年將增至360億美元。IC Insights今年8月發佈的報告顯示，汽車MCU佔據全球MCU市場的40%，預計2021年汽車MCU銷售額將達到76億美元，相比去年成長23%，其中約77%都是32位元MCU。 Read the full article.
How to run Ockam on RISC-V Linux | OckamIn this hands-on guide, we'll show how to cross compile a Rust example of Ockam for RISC-V Linux systems. We'll also see how to test…
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Alibaba’s chip unit realizes key breakthroughs with Xuantie CPU | Global TimesThe semiconductor division of Chinese tech giant Alibaba Group announced on Tuesday that its self-developed Xuantie embedded central processing unit (CPU) has made technological breakthroughs…
RISC-V could be coming to supercomputers (eventually) | Brad Linder, liliputingRISC-V chips like the processors are starting to show up in low-power, open source computers like the HiFive Unmatched and Nezha as well as educational products like the BBC Doctor…
European Processor Initiative Tapes Out Their First RISC-V Test Chip | Robin Mitchell, ElectroPagesRecently, the EPI announced that it has developed its first HPC chip using RISC-V technology and is now in the stages of having the device…
RISC-V boffins lay out a plan for bringing the architecture to high-performance computing | Gareth Halfacree, The Register'The group is united in making RISC-V an option in HPC,' says SIG-HPC chair RISC-V International, the nonprofit at the helm of the free and…
Cortus Develops Next Generation High-End RISC-V CPU Core for HPCMauguio, France – June, 14th 2021: Cortus S.A.S., a leader in custom Systems-on-Chip (SoC) design services and integrated circuit (IC) provider, today announced that it is developing the high-performance Out-of-Order (OoO) processor core which is…
RISC-V Evolving to Address Supercomputers and AI | Anton Shilov, Tom’s HardwareThe open source RISC-V instruction set architecture is gaining more mainstream attention in the wake of Intel's rumored $2 billion bid for SiFive, the industry's leading…
Video: Let’s build a custom RISCV64 Unmatched Linux kernel! | More Bits Inside, Rene RebeSee RISC-V Community member Rene Rebe build a custom RISCV64 Linux Kernel on the SiFive Unmatched. Watch the full video on More Bits with Rene…
Rebooting Imagination: A Heterogeneous Compute Strategy | Nitin Dahad, EE TimesThe EE Times C-Suite Interview Series Last October, Imagination Technologies hired a new CEO, Simon Beresford-Wylie. He is Imagination’s sixth CEO in 6 years, and…
Advanced Computing Systems Research Project Seeks Collaboration | Tactical Computing LabsAdvanced Computing Systems Research Project Seeks Collaboration RISC-V based effort seeks improvements on critical computing systems Texas, June 2021: Tactical Computing Laboratories is joining forces with others…
Video:Image-based target identification on a tiny Risc-V multi-core application processor Manuele RUSCI - Embedded Machine Learning Engineer Greenwaves In this talk, we will explain the…