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RISC-V: The New Architecture on the Block | Klara Systems
SiPearl opens design centre in Grenoble, looks for 50 engineers | Nick Flaherty, EE News Europe
IoT Use Cases Based on Telink TLSR9 Series RISC-V Connectivity SoC | Telink Semiconductor, RISC-V Con China
The RISC-V BL602 Book | Lee Lup Yuen
MicroZed Chronicles: Bluespec RISC-V | Adam Taylor, Adiuvo Engineering and Training, LTD.
Esperanto Technologies on Accelerating Machine Learning | Dave Ditzel, Hot Chips 33
Agenda for the RISC-V Summit 2021: Together We Are Shaping the Open Era of Computing
Security Enclave IP Based on RISC-V | Silex Insight
RVSoC Project: A Portable and Linux Capable RISC-V Computer System on an FPGA | Arch Lab, Tokyo Tech
RISC-V Upstart Targets ML Inference Performance, Power Efficiency | Jeffrey Burt, The Next Platform
6,000 RISC-V Cores on a Xilinx FPGA Break the CoreScore World Record | Francisco Pires, Tom’s Hardware
Chiplet Strategy is Key to Addressing Compute Density Challenges | Balaji Baktha of Ventana Micro Systems, EE Times
What Is RISC-V? | elektor mag.
Silex Insight and Andes Technology Extend Strategic Partnership to Deliver Flexible and Scalable Root-of-Trust Security IP Solution
SiFive FU740 PCIe Support Queued Ahead Of Linux 5.13 | Michael Larabel, phoronix
RISC-V Raspberry Pi Alternative Edges Closer to Release | Ian Evenden, Toms Hardware
Espressif’s ESP32-C6 brings the next generation wireless connectivity | Open CloudwareSiFive Tapes Out Their First 5nm RISC-V Processor Core | Michael Larabel
A first look at Allwinner D1 Linux RISC-V SBC and Processor | Jean-Luc Aufranc, CNX Soft
Homebrew RISC-V Computer Has Beauty and Brains | Tom Nardi, HackadayLow-Cost Single-Board Computers with RISC-V Chips are Coming Soon | Brad Linder, liliputing
Video: The Future of RISC-V in HPC – Vadim Malenboim, Sr Field Application Engineer, SiFive Core IP
SiFive Tapes Out First 5nm TSMC RISC-V Chip With 7.2 Gbps HBM3 | Anton Shilov, Tom’s Hardware
From NIST to RISC-V: PQShield continues its leading role in international cryptography standardisation efforts for software and hardware | Dr Ali El Kaafarani
RISC-V: The New Architecture on the Block | Klara SystemsThe majority of people in the tech community are well aware of the two main chip architectures: x86 and ARM. Each has its own strengths…
SiPearl opens design centre in Grenoble, looks for 50 engineers | Nick Flaherty, EE News EuropeSiPearl has opened a design centre in Grenoble with the goal of recruiting 50 engineers on the site by the end of 2022. The company…
IoT Use Cases Based on Telink TLSR9 Series RISC-V Connectivity SoC | Telink Semiconductor, RISC-V Con ChinaHear the latest news from Telink and Andes Technologies on IoT use cases based on the Telink TLSR9 series RISC-V SoC. Read the full presentation.
The RISC-V BL602 Book | Lee Lup YuenFind out what’s inside the BL602 / BL604 System-on-a-Chip (SoC)… And why it’s unique among the microcontrollers we’ve seen. Read the full tutorial.
MicroZed Chronicles: Bluespec RISC-V | Adam Taylor, Adiuvo Engineering and Training, LTD.There are several FPGA use cases where a softcore processor is beneficial to the overall solution. These can include anything from performing simple communication and…
Esperanto Technologies on Accelerating Machine Learning | Dave Ditzel, Hot Chips 33Watch the full presentation by Dave Ditzel, Chairman and Founder of Esperanto Technologies, on “Accelerating ML Recommendation with over a Thousand RISC-V/Tensor Processors on Esperanto’s…
Agenda for the RISC-V Summit 2021: Together We Are Shaping the Open Era of ComputingThe RISC-V Summit is the flagship event of the RISC-V community, bringing together people from around the world to show the power of open collaboration…
Security Enclave IP Based on RISC-V | Silex InsightRead the full educational brochure from Silex Insights on security enclave IP based on RISC-V.
RVSoC Project: A Portable and Linux Capable RISC-V Computer System on an FPGA | Arch Lab, Tokyo TechThe RVSoC Project is a research and development project of the RISC-V computer system targeting FPGAs in Verilog HDL at Arch Lab, Tokyo Tech. RVSoC…
RISC-V Upstart Targets ML Inference Performance, Power Efficiency | Jeffrey Burt, The Next PlatformThere is a growing number of vendors big and small going hard to the hoop to make processors for artificial intelligence workloads. AI and machine…
6,000 RISC-V Cores on a Xilinx FPGA Break the CoreScore World Record | Francisco Pires, Tom’s HardwareA new world record for the densest arrangement of RISC-V cores (measured by the CoreScore benchmark) has been achieved by pairing 6,000 RISC-V SERV cores…
Chiplet Strategy is Key to Addressing Compute Density Challenges | Balaji Baktha of Ventana Micro Systems, EE TimesData center workloads are quickly evolving, demanding high compute density with varying mixes of compute, memory and IO capability. This is driving architectures that are…
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What Is RISC-V? | elektor mag.The electronics industry seems to have gone crazy for RISC-V. But why? What is RISC-V and how can you participate in it? If you’ve read…
Silex Insight and Andes Technology Extend Strategic Partnership to Deliver Flexible and Scalable Root-of-Trust Security IP SolutionSilex Insight and Andes Technology offer the eSecure solution as part of the AndeSentry™ security framework. The eSecure IP module, including security boot, sensitive key…
SiFive FU740 PCIe Support Queued Ahead Of Linux 5.13 | Michael Larabel, phoronixArguably the most interesting RISC-V board announced to date is SiFive's HiFive Unmatched with the FU740 RISC-V SoC that features four U74-MC cores and one…
RISC-V Raspberry Pi Alternative Edges Closer to Release | Ian Evenden, Toms HardwareD1 puts RISC-V into the hands of makers everywhere A potential new Raspberry Pi competitor will soon be announced, according to a post on embedded…
Espressif’s ESP32-C6 brings the next generation wireless connectivity | Open CloudwareEspressif recently launched the ESP32-C6, which adds up to its long list of ESP32 series of SoCs. The ESP32-C6 is claimed to be the company’s…
SiFive Tapes Out Their First 5nm RISC-V Processor Core | Michael LarabelSiFive's OpenFive business unit announced today they have completed their first tape out of a RISC-V processor core using TSMC's 5nm process. This 5nm RISC-V…
A first look at Allwinner D1 Linux RISC-V SBC and Processor | Jean-Luc Aufranc, CNX SoftLast year, we reported that Allwinner was working on an Alibaba XuanTie C906 based RISC-V processor that would be found in low-cost Linux capable single…
Homebrew RISC-V Computer Has Beauty and Brains | Tom Nardi, HackadayBuilding your own CPU is arguably the best way to truly wrap your head around how all those ones and zeros get flung around inside…
Low-Cost Single-Board Computers with RISC-V Chips are Coming Soon | Brad Linder, liliputingThe first single-board computers powered by an Allwinner Xuantie-C906 processor could be set to ship soon. The chip isn’t exactly a speed demon, but it…
Video: The Future of RISC-V in HPC – Vadim Malenboim, Sr Field Application Engineer, SiFive Core IPRISC-V Architecture is widely adopted in the embedded and IoT market. The next phase of RISC-V Architecture evolution is the HPC segment. The SiFive portfolio…
SiFive Tapes Out First 5nm TSMC RISC-V Chip With 7.2 Gbps HBM3 | Anton Shilov, Tom’s HardwareSiFive and OpenFive hit 5nm milestone. SiFive on Tuesday said that that its OpenFive division has successfully taped out the company's first system-on-chip (SoC) on TSMC's N5…
From NIST to RISC-V: PQShield continues its leading role in international cryptography standardisation efforts for software and hardware | Dr Ali El KaafaraniPQShield announces appointment of Ben Marshall, editor and main author of the RISC-V “K’ Cryptography Extension, to bolster its hardware division PQShield, the cybersecurity company…