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Unlock the RISC-V Naming Code | Richard A. Quinnell, Digi-Key
The Accuracy and Efficiency of Posit Arithmetic | Stefan Dan Ciocirlan, Dumitrel Loghin, Lavanya Ramapantulu, Nicolae Tapus, and Yong Meng TeoHiFive Unmatched – some benchmarking results | Gábor Samu, Technical Computing Goulash
Whitepaper: Ensuring the Success of Your RISC-V Product with a Commercial-Grade Software Development Ecosystem | Engineering.com
Data Center Hot Chips, Plus Aart de Geus on AI in Chip Design | Sally Ward-Foxton , EE Times
RISC-V Pioneer SiFive Opens its First UK Office, Announces Hiring Push | Gareth Halfacree , AB Open
Study about the impact of open source software and hardware on technological independence, competitiveness and innovation in the EU economy | European Commission
RISC-V Launches the Open Hardware Diversity Alliance
Announcing the latest Open Source Peer Bonus winners | Google Open Source Blog
Russian Company Develops 32-Bit RISC-V Microcontroller | Anton Shilov , Tom’s HardwareEpileptic Seizure Detection on an Ultra-Low-Power Embedded RISC-V Processor Using a Convolutional Neural Network | Andreas Bahr, Matthias Schneider, Maria Avitha Francis, Hendrik M. Lehmann, Igor Barg, Anna-Sophia Buschhoff, Peer Wulff, Thomas Strunskus, and Franz Faupel
Antmicro Doubles Down on Commitment to Zephyr RTOS as Community Grows to More Than 1,000 Contributors | The Zephyr Project
Video: (EN) AndeSysC™ – A Flexible RISC-V Processor Model for SoC Virtual Prototyping
Video: Fun Hardware With RISC-V Processors
Geniatech DB1126 Development Board Features RV1126 SoC for AI Applications | ABHISHEK JADHAV, CNX Software
Open-Source Verification not as Easy as Design | John Blyler, Design News
SiFive and DARPA Collaborate to Bring the Power of RISC-V to Technology Innovation | Press Release
SiFive and DARPA Collaborate to Bring the Power of RISC-V to Technology Innovation | BusinessWire
NASA Joins Forces with Small Business Team | Tactical Computing Labs
Imperas releases free ISS for RISCV-V CORE-V developers in the OpenHW ecosystem | Imperas
Geniatech DB1126 development board features RV1126 SoC for AI applications | ABHISHEK JADHAV, CNX-Software
Open-Source Verification not as Easy as Design | John Blyler, Design News
What Does RISC-V Stand For? | Semiconductor Engineering, Roddy Urquhart
Fun Hardware With RISC-V Processors | TWiT Tech Podcast Network
Unlock the RISC-V Naming Code | Richard A. Quinnell, Digi-KeyThe RISC-V instruction set architecture (ISA) provides a unique opportunity. Its structure allows developers to use processors with a wide range of sizes and performance…
The Accuracy and Efficiency of Posit Arithmetic | Stefan Dan Ciocirlan, Dumitrel Loghin, Lavanya Ramapantulu, Nicolae Tapus, and Yong Meng TeoMotivated by the increasing interest in the posit numeric format, in this paper we evaluate the accuracy and efficiency of posit arithmetic in contrast to…
HiFive Unmatched – some benchmarking results | Gábor Samu, Technical Computing GoulashNo sooner did I receive my SiFive HiFive Unmatched board than did the questions about the performance of the board start to come in -…
Whitepaper: Ensuring the Success of Your RISC-V Product with a Commercial-Grade Software Development Ecosystem | Engineering.comRISC-V provides a new option for microcontroller and microprocessor designs. Embedded designers now have a choice for basing their products either on one of several…
Data Center Hot Chips, Plus Aart de Geus on AI in Chip Design | Sally Ward-Foxton , EE TimesWelcome to AI with Sally, a podcast that takes a closer look at some of the most interesting technology stories on artificial intelligence and machine…
RISC-V Pioneer SiFive Opens its First UK Office, Announces Hiring Push | Gareth Halfacree , AB OpenRISC-V pioneer SiFive has opened its first office in the UK, and promises that staff there will enjoy “location flexibility” as the company looks to…
Study about the impact of open source software and hardware on technological independence, competitiveness and innovation in the EU economy | European CommissionOpen Source is increasingly used in digital technologies. This required an in-depth analysis of its current role, position and potential for the European economy. Open…
RISC-V Launches the Open Hardware Diversity AllianceFounded in Collaboration with the CHIPS Alliance, OpenPOWER Foundation, and Western Digital, the Alliance is Focused on Providing Support Programs, Learning Opportunities, and Mentoring for…
Announcing the latest Open Source Peer Bonus winners | Google Open Source BlogCongratulations to Bruno Levy for his work on the RISC-V Ecosystem on FPGAs and Carlos de Paula for his work on SymbiFlow and the RISC-V…
Russian Company Develops 32-Bit RISC-V Microcontroller | Anton Shilov , Tom’s HardwareAs we can see with the new Mikron MIK32 chip, the open-source RISC-V architecture opens doors for companies to redevelop existing microcontrollers. That's becoming even…
Epileptic Seizure Detection on an Ultra-Low-Power Embedded RISC-V Processor Using a Convolutional Neural Network | Andreas Bahr, Matthias Schneider, Maria Avitha Francis, Hendrik M. Lehmann, Igor Barg, Anna-Sophia Buschhoff, Peer Wulff, Thomas Strunskus, and Franz FaupelThe treatment of refractory epilepsy via closed-loop implantable devices that act on seizures either by drug release or electrostimulation is a highly attractive option. For…
Antmicro Doubles Down on Commitment to Zephyr RTOS as Community Grows to More Than 1,000 Contributors | The Zephyr ProjectOn the heels of its 5th anniversary and inaugural Developer Summit, the Zephyr™ Project today announces a major milestone with more than 1,000 contributors and…
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Video: (EN) AndeSysC™ – A Flexible RISC-V Processor Model for SoC Virtual Prototyping2021 Andes RISC-V Webinar Date: March 25, 2021 Topic: AndeSysC™ - A Flexible RISC-V Processor Model for SoC Virtual Prototyping Speaker: YiChiang Chang, Technical Marketing…
Video: Fun Hardware With RISC-V ProcessorsKeith Packard shares his passion of hobbyist rocketry and hardware design. Packard and his partners develop hardware for rocketry kits using RISC-V processors. Doc Searls…
Geniatech DB1126 Development Board Features RV1126 SoC for AI Applications | ABHISHEK JADHAV, CNX SoftwareGeniatech DB1126 development board features RV1126 SoC for AI applications Since the release of Rockchip RV1126 SoC, we have covered the detailed specifications on the chip…
Open-Source Verification not as Easy as Design | John Blyler, Design NewsOpen-source software verification of open-source hardware design like RISC-V possesses many new challenges. The allure of open-source hardware is the flexibility for designers to create…
SiFive and DARPA Collaborate to Bring the Power of RISC-V to Technology Innovation | Press ReleaseLicensing agreement provides access to a broad portfolio of IP from the inventors of RISC-V SAN MATEO, Calif.--(BUSINESS WIRE)--SiFive, Inc., the leading provider of commercial…
SiFive and DARPA Collaborate to Bring the Power of RISC-V to Technology Innovation | BusinessWireSAN MATEO, Calif.--(BUSINESS WIRE)--SiFive, Inc., the leading provider of commercial RISC-V processor IP and custom silicon solutions, today announced an open licensing agreement with the…
NASA Joins Forces with Small Business Team | Tactical Computing LabsProposed System Architecture Application for Space Advancement MUENSTER, TEXAS, March 2021: NASA has selected 365 U.S. small business proposals for initial funding from the agency’s…
Imperas releases free ISS for RISCV-V CORE-V developers in the OpenHW ecosystem | ImperasImperas simulation technology with RISC-V reference models of the OpenHW CORE-V IP portfolio released as free Instruction Set Simulator for software development. Oxford, UK –…
Geniatech DB1126 development board features RV1126 SoC for AI applications | ABHISHEK JADHAV, CNX-SoftwareSince the release of Rockchip RV1126 SoC, we have covered the detailed specifications on the chip and the RV1126-based Firefly dual-lens AI camera module. To take advantage…
Open-Source Verification not as Easy as Design | John Blyler, Design NewsThe allure of open-source hardware is the flexibility for designers to create their own CPU-based platforms. Advocates believe that freely available open-source systems will encourage…
What Does RISC-V Stand For? | Semiconductor Engineering, Roddy UrquhartRISC-V (pronounced “risk-five”) stands for ‘reduced instruction set computer (RISC) five’. The number five refers to the number of generations of RISC architecture that were developed at…
Fun Hardware With RISC-V Processors | TWiT Tech Podcast NetworkKeith Packard shares his passion of hobbyist rocketry and hardware design. Packard and his partners develop hardware for rocketry kits using RISC-V processors. Doc Searls…