Thank You For Attending RISC-V Summit North America! | Missed the event? Watch Now.

No recent posts listed
Andes Technology and Cyberon Collaborate to Provide Edge-Computing Voice Recognition Solution on DSP-capable RISC-V Processors | Intrado

Cyberon Corporation, a leading embedded speech solution provider, and Andes Technology (TWSE: 6533), a major supplier for high efficiency, low-power 32/64-bit RISC-V processor cores, announced…

Simpira Gets Simpler: Optimized Simpira on Microcontrollers | Minjoo Sim and Siwoo Eum and Hyeokdong Kwon and Kyungbae Jang and Hyunjun Kim and Hyunji Kim and Gyeongju Song and Wai-Kong Lee and Hwajeong Seo, Cryptology ePrint

Abstract: Simpira Permutation is a Permutation design using the AES algorithm. The AES algorithm is the most widely used in the world, and Intel has…

RISC-V Cryptography Extensions Task Group Announces Public Review of the Scalar Cryptography Extensions

The Cryptography Extensions Task Group is delighted to announce the start of the public review period for the RISC-V Scalar Cryptography extensions. The RISC-V Scalar…

Video: Apple’s GPU Maker is Designing RISC-V CPUs for Mobiles and Desktops | Gary Explains

Watch the full video on Gary Explains. Description: Imagination is returning to the CPU market, this time using RISC-V. It aims to sell designs for…

A Novel Compaction Approach for SBST Test Programs | Juan-David Guerrero-Balaguera, Josie E. Rodriguez Condia, and Matteo Sonza Reorda

In-field test of processor-based devices is a must when considering safety-critical systems (e.g., in robotics, aerospace, and automotive applications). During in-field testing, different solutions can…

Haawking licenses SEGGER’s emRun for RISC-V | SEGGER

SEGGER Microcontroller announces that Beijing Haawking Technology, a specialist provider of RISC-V-based DSPs, has licensed SEGGER's emRun for RISC-V Runtime Library for distribution with its…

Hot Chips Concludes An Amazing Lineup of AI Chip Companies | Karl Freund, Forbes

Every year, I promise not to attend this tech-heavy confab of fast chips. And every year, I break that promise. Just too much to ignore!…

Apple Exploring RISC-V, Hiring RISC-V ‘High Performance’ Programmers | Anton Shilov, Tom’s Hardware

Apple is in the process of switching its PCs to Arm-based SoCs, but the company might not be putting all its eggs into one basket,…

Rivos Inc: A Chip Off The Old Block? New RISC-V Startup Garners Many Senior CPU Architects From Apple, Google, Marvell, Qualcomm, Intel, and AMD | Dylan Patel, Semi Analysis

We recently wrote about a new CPU startup that has been garnering very impressive leadership and architects from all over. We have now confirmed the…

Ventana Micro Systems raises $38M to design datacenter RISC-V processors | Dean Takahashi, Venture Beat

Ventana Micro Systems has raised $38 million to design datacenter RISC-V processors as part of a push to create open hardware. Ventana’s chips will be…

efabless, Google and SkyWater Are Enabling Us Mere Mortal Makers to Design Our Own Open Source ASICs | Tom Fleet, Hackster.io

We've witnessed a lot happening to help the plight of modern makers in recent years. We now have professionally-produced panels of PCBs, for mere peanuts.…

AB32VG1 – An Arduino Uno-like RISC-V based development Board Designed for Audio Applications | Electronics-Lab

Bluetrum, a Chinese chip manufacturer known for its high-performance Bluetooth speakers and headsets, has designed an audio player microcontroller for audio applications and other general…

No recent posts listed
No recent posts listed
No recent posts listed
Enabling Edge AI Vision with RISC-V and a Silicon Platform | Tom Simon

AI vision processing moving to the edge is an undeniable industry trend. OpenFive, the custom silicon business unit of SiFive, discusses this trend with compelling…

MIPS, China’s Loongson CPU Are Both Going All-in on RISC-V | Joel Hruska

RISC-V is having itself a moment. What began as an effort to produce an open-source ISA for low-end microcontrollers and other simple kinds of chips…

Video: PineTalk episode 4: GPU-o-Rama | Pine64

In the fourth episode of PineTalk, Ezra and Peter discuss Matrix video calling on the PinePhone, open source GPUs on RISC-V and go though your…

Home News Hackers hack at unhackable new chip for three months. Chip remains unhacked | Dave James, PC Gamer

University of Michigan's Morpheus chip has passed its stiffest security test to far. The dangerous-titled 'unhackable' processor has survived its biggest hacking test remarkably unscathed.…

Xen and the RISC-V Hypervisor Extension

As some readers may know, we've been working on porting Xen to RISC-V.  This blog looks at why we care about RISC-V and how RISC-V…

7 Things You Probably Do Not Know about De-RISC PROJECT

Read the full article to see all 7 things!

OpenHW Group and Mitacs announce OpenHW Accelerate | OpenHW Group

Today, OpenHW Group and Mitacs announced OpenHW Accelerate, a $22.5M multi-year co-funded research program, the world’s first open-source hardware research program of its kind. OpenHW…

Bluetrum AB32VG1 board features AB5301A Bluetooth RISC-V MCU, runs RT-Thread RTOS | Jean-Luc Aufran, CNX Software

Bluetrum, a Shenzhen-based fabless company focusing on audio chips, has designed the AB32VG1 board based on its AB5301A Bluetooth RISC-V MCU for general-purpose and audio applications.…

CODASIP ANNOUNCES COMMERCIAL ADD-ONS TO SWERV CORE® EH1 | Codasip

Munich, Germany – March 9th, 2021 – Codasip, the leading supplier of customizable RISC‑V processor IP, announced three commercially licensed add-ons to the Western Digital SweRV…

EU Seeks to Double Share of World Chip Market by 2030 in ‘Digital Sovereignty’ Drive | Daniel Michaels and Stu Woo, WSJ

BRUSSELS—The European Union is pledging more than $150 billion to develop next-generation digital industries this decade as it seeks to reverse a widening gap with…

Codasip Announces Commercial Add-Ons to SweRV Core EH1

Munich, Germany – March 9th, 2021 – Codasip, the leading supplier of customizable RISC‑V processor IP, announced three commercially licensed add-ons to the Western Digital SweRV…

Wait, What? MIPS Becomes RISC-V Classic CPU Company Exits Bankruptcy, Throws in the Towel |Jim Turley, Electronics Engineering Journal

What a long, strange trip it’s been. MIPS Technologies no longer designs MIPS processors. Instead, it’s joined the RISC-V camp, abandoning its eponymous architecture for…