Thank You For Attending RISC-V Summit North America! | Missed the event? Watch Now.

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As Linux Foundation’s Zephyr Project Turns Five, Addressing Constrained Device Challenges is More Important Than Ever | IoT Evolution, Arti Loftus

Noting nearly 1,000 contributors, 50,000 commits building advanced support for multiple architectures including ARC, Arm, Intel, Nios, RISC-V, SPARC and Tensilica, and more than 250…

RISC-V RV32I RTL Architecture | Maven Silicon

This video explains the RTL architecture of an RV32I RISC-V processor. Also, it shows how we can create the RISC-V RTL using basic building blocks…

Alibaba Future-Proofing Cloud OS, Will Support Multiple Architectures | WebProNews, Matt Milano

Alibaba is working to make its Apsara cloud OS compatible with a variety of architectures in an effort to future-proof it. Alibaba started as an…

The Zephyr Project Celebrates 5th Anniversary with new members and inaugural Zephyr Developer Summit on June 8-10

“RISC-V and Zephyr were both designed to drive innovation in the hardware space with open source technologies that are accessible to everyone,” said Mark Himelstein,…

Huawei Release Their First RISC-V Development System – Hi3861 | electropages

Recently, Huawei released their first RISC-V development system to help engineers use the HarmonyOS operating system targeted at IoT devices. So why is Huawei looking…

Antmicro Open Source Portal launched

Antmicro was founded on the belief that open source can dramatically accelerate technological progress by enabling collaboration, transparency and freedom to customize, improve and combine…

TII’s Secure Systems Research Centre Joins RISC-V International

TII becomes a strategic member of the global organisation whose open-source standard allows for collaboration and breakthroughs in the computer chip industry, including the ability…

PUFsecurity and Andes Technology Cooperate to Integrate Crypto Coprocessor PUFiot into RISC-V AIoT Security Platform

Hsinchu Taiwan, June 02, 2021 (GLOBE NEWSWIRE) -- PUFsecurity, a security solutions IP company, and Andes Technology (TWSE: 6533), a leading RISC-V CPU IP vendor,…

European supercomputer test chip tapes out | eeNews, Peter Clarke

The EPAC 1.0 test chip is now ready to be sent to fabrication, It contains a number of accelerator cores some based on RISC-V instruction…

VIDEO: TII’s Secure Systems Research Centre Joins RISC-V International | ATRC

#TII’s Secure Systems Research Centre (#SSRC) has become a strategic member of RISC-V International, an organisation which directs the future development and drives the adoption…

Technology Innovation Institute’s Centre Joins RISC-V International | Faizan Hashmi

ABU DHABI, (UrduPoint / Pakistan Point News / WAM - 02nd Jun, 2021) Technology Innovation Institute (TII), the applied research pillar of Abu Dhabi’s Advanced…

HiFive ISS | UKRocketry

Connecting to the ISS crew manifest using an online API, the BBC HiFive and its onboard ESP32 using Micropython.

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What is RISC-V? Origins and Forecast | Tech Design

RISC-V ISA delivers free, extensible software and hardware freedom on architecture, paving the way for years of computing design and innovation. Read the full article.]]>

Linux on RISC-V with Open Source Hardware (OSSummit Japan 2020) | Drew Fustini

Want to run Linux on open hardware? This talk will explore how the RISC-V, an open instruction set (ISA), and open source FPGA tools can…

Security Gaps In Open Source Hardware And AI | Ed Sperling, Semiconductor Engineering

Semiconductor Engineering sat down to discuss security risks across multiple market segments with Helena Handschuh, security technologies fellow at Rambus; Mike Borza, principal security technologist for…

AdaCore Introduces GNAT Pro for the Wind River® Helix™ Virtualization Platform

GNAT Pro Ada, C and C++ development toolsuites in support of the Wind River® Helix™ Virtualization Platform. Offered in separate Ada and C/C++ packages, GNAT Pro enhances Helix Platform's…

Using AI And Bugs To Find Other Bugs | Ann Steffora Mutschler, Semiconductor Engineering

New methodologies are being developed to deal with increasing complexity. Debug is starting to be rethought and retooled as chips become more complex and more…

M1108 AI accelerator chip delivers up to 35 TOPS for high-end edge AI applications | Abhishek Jadhav, CNX Software

M1108 AI accelerator chip delivers up to 35 TOPS for high-end edge AI applications Last week, Mythic announced a breakthrough with compute-in-memory technology based on…

RISC-V Summit: agenda highlights | Nitin Dahad, Embedded

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Pine64’s PINECIL RISC-V soldering iron launched for $25 | Jean-Luc Aufranc, CNX Software

PINECIL RISC-V soldering iron during Pine64’s release of PineCube open-source IP camera development kit, and the good news is the soldering iron is now available…

Using AI And Bugs To Find Other Bugs | Ann Steffora Mutschler, Semiconductor Engineering

New methodologies are being developed to deal with increasing complexity. Debug is starting to be rethought and retooled as chips become more complex and more…

What Interested You In 2020 | Brian Bailey, Semiconductor Engineering

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Renode 1.11 – improved testing, RISC-V support and user experience | Antmicro

already available. As usual, the new release introduces a range of features, modifications and fixes, enabling developers to design complex embedded IoT systems more effectively…