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Why Maven Silicon for Upskilling Your Chip Design Workforce?
Ashling RiscFree™ C/C++ SDK support for the Zephyr Real-Time Operating System (RTOS)
The Power of RISC-V: DAC Panel with Intel, Imperas, Meta, OpenHW Group & Ventana
The Growing Momentum of RISC-V in Europe
YOLOX for Object Detection
SiFive’s WorldGuard Security Platform Now Available to the Entire RISC-V Ecosystem
Ashling announces RiscFree™ C/C++ SDK support for Lattice RISC-V MCU CPU Soft IP CoresThe Incredible Growth of RISC-V in India
Open Source and CI-driven RTL Testing and Verification for Caliptra’s RISC-V VeeR Core
RISC-V Summit Europe 2023: Highlights from Barcelona
The Call for Papers for RISC-V Summit China 2023 is Open
GreenRio: A Linux-Compatible RISC-V Processor Designed for Open-Source EDA Implementations
Tiempo Secure becomes a Strategic Member of RISC-V International | Tiempo Secure
RiVAI Technologies Announced New Products in Their RISC-V Vector DSP IP Family: RiVAI V7 And RiVAI V9+ | RiVAI Technologies
Make the Most of Rad-Hard RTG4 FPGAs with the Right Approach to Timing and Resets | Microchip Technology
RISC-V International Announces Agenda for RISC-V Summit 2022 | RISC-V InternationalAnnouncing RISC-V International’s Expanded Developer Boards Program | RISC-V International
DeepComputing and Xcalibyte announce the ROMA laptop will be powered by TH1520 – the first SoC from Wujian 600’s platform by Alibaba T-Head | XcalibyteXuanTie Security System Promotes Rapid Migration of Security Applications from Arm to RISC-V | Vincent Cui, Alibaba Cloud
Customising PolarFire® SoC FPGA for International Space Station Mission | Microchip Technology
Cortus Announces the Launch of its New Secure Low Power RISC-V Microcontrollers | Cortus S.A.SRenodepedia – From Zephyr’s structured data to traceable and testable open hardware with Renode | Antmicro
SOC Verification Flows and Methodologies | Sivakumar P R, Maven SiliconHow will you share your RISC-V knowledge and wisdom? | RISC-V International
Tiempo Secure becomes a Strategic Member of RISC-V International | Tiempo SecureRiVAI Technologies Announced New Products in Their RISC-V Vector DSP IP Family: RiVAI V7 And RiVAI V9+ | RiVAI TechnologiesMake the Most of Rad-Hard RTG4 FPGAs with the Right Approach to Timing and Resets | Microchip TechnologyRISC-V International Announces Agenda for RISC-V Summit 2022 | RISC-V InternationalAnnouncing RISC-V International’s Expanded Developer Boards Program | RISC-V InternationalDeepComputing and Xcalibyte announce the ROMA laptop will be powered by TH1520 – the first SoC from Wujian 600’s platform by Alibaba T-Head | XcalibyteXuanTie Security System Promotes Rapid Migration of Security Applications from Arm to RISC-V | Vincent Cui, Alibaba CloudCustomising PolarFire® SoC FPGA for International Space Station Mission | Microchip TechnologyCortus Announces the Launch of its New Secure Low Power RISC-V Microcontrollers | Cortus S.A.SRenodepedia – From Zephyr’s structured data to traceable and testable open hardware with Renode | AntmicroSOC Verification Flows and Methodologies | Sivakumar P R, Maven SiliconHow will you share your RISC-V knowledge and wisdom? | RISC-V International
Why Maven Silicon for Upskilling Your Chip Design Workforce?By: Sivakumar PR My recent article, ‘Chip War without Soldiers’ explained the importance of upskilling and preparing the chip design workforce in this current scenario,…
Ashling RiscFree™ C/C++ SDK support for the Zephyr Real-Time Operating System (RTOS)By Hugh O’Keeffe, Ashling Ashling’s RiscFree SDK provides full support for the Zephyr RTOS running on RISC-V based IP cores and devices including debug support…
The Power of RISC-V: DAC Panel with Intel, Imperas, Meta, OpenHW Group & VentanaRISC-V was one of the key themes at DAC 2023. We had a RISC-V Zone where six members discussed their latest RISC-V activities, and there…
The Growing Momentum of RISC-V in EuropeBy: Kezia Leung The RISC-V Summit Europe brought together members of the RISC-V community from industry, government, research, and academia to explore how RISC-V is…
YOLOX for Object DetectionAuthor: Meng Chang This topic presents an example about how to deploy a YOLOX model on a RISC-V development board for object detection. The content…
SiFive’s WorldGuard Security Platform Now Available to the Entire RISC-V EcosystemData and codes are only as powerful as the security platform that protects them. Without a robust security model for isolated code execution and data…
Ashling announces RiscFree™ C/C++ SDK support for Lattice RISC-V MCU CPU Soft IP CoresLimerick, Ireland – July 14, 2023 – Ashling today announced its RiscFree SDK has been added to the Lattice Semiconductor RISC-V ® MC CPU soft…
The Incredible Growth of RISC-V in IndiaRISC-V is being adopted around the world as the silicon industry looks to the open RISC-V instruction set architecture (ISA) to offer a new level…
Open Source and CI-driven RTL Testing and Verification for Caliptra’s RISC-V VeeR CoreAs part of CHIPS Alliance’s mission to enable a software-driven approach to silicon, working with Google and other CHIPS members, Antmicro has been developing and improving…
RISC-V Summit Europe 2023: Highlights from BarcelonaMore than 500 attendees, from across the world, attended the first-ever RISC-V Summit Europe Last month, the first-ever RISC-V Summit Europe happened in Barcelona, Spain.…
The Call for Papers for RISC-V Summit China 2023 is OpenRISC-V Summit China is a major international event to share technical and business innovation around RISC-V. The global event brings together the community for a…
GreenRio: A Linux-Compatible RISC-V Processor Designed for Open-Source EDA ImplementationsSince 20 years ago, Intel has successfully developed the 3 GHz processor in 130nm process. However, as the design complexity of IC continues to increase,…
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Tiempo Secure becomes a Strategic Member of RISC-V International | Tiempo SecureAs a Strategic member of RISC-V International, Tiempo Secure will secure and integrate processors implementing the RISC-V open standard instruction set architecture (ISA) into its TESIC Secure Element…
RiVAI Technologies Announced New Products in Their RISC-V Vector DSP IP Family: RiVAI V7 And RiVAI V9+ | RiVAI TechnologiesRiVAI Technologies has recently launched two new high-performance RISC-V vector IP series products: RiVAI V7 and RiVAI V9+, both with a customized RVV extension optimizing…
Make the Most of Rad-Hard RTG4 FPGAs with the Right Approach to Timing and Resets | Microchip TechnologyDevelopers need to consider timing penalties when using rad-hard parts like our RTG4™ FPGAs. Choosing the right way to apply resets can help you optimize…
RISC-V International Announces Agenda for RISC-V Summit 2022 | RISC-V InternationalThis year’s Summit includes keynotes, technical and industry tracks and tutorials, as well as member exhibitions, networking opportunities and more RISC-V International will host…
Announcing RISC-V International’s Expanded Developer Boards Program | RISC-V InternationalThe RISC-V Developer Boards program drives RISC-V innovation by making development boards more accessible to the global RISC-V community. Read on to learn how the…
DeepComputing and Xcalibyte announce the ROMA laptop will be powered by TH1520 – the first SoC from Wujian 600’s platform by Alibaba T-Head | XcalibyteAlibaba T-Head recently released a brand-new high-performance RISC-V SoC named the TH1520 at The RISC-V Summit China 2022. According to Alibaba “TH1520 demonstrates exceptional speed…
XuanTie Security System Promotes Rapid Migration of Security Applications from Arm to RISC-V | Vincent Cui, Alibaba CloudRecently at the RISC-V Summit China 2022 a new high-performance RISC-V-based chip platform named Wujian 600 and the TH1520 chip prototype was revealed. These products…
Customising PolarFire® SoC FPGA for International Space Station Mission | Microchip TechnologyOur Mi-V Ecosystem partner Emdalo Technologies Ltd. (Emdalo) has successfully customised PolarFire® SoC FPGA Linux® and associated boot flow for Skycorp Inc.’s recent space-mission on…
Cortus Announces the Launch of its New Secure Low Power RISC-V Microcontrollers | Cortus S.A.SCortus, an innovative French fabless semiconductor company today announces the availability of its secure low power RISC-V microcontrollers (MCUs) that address consumer products and automotive…
Renodepedia – From Zephyr’s structured data to traceable and testable open hardware with Renode | AntmicroThe abundance and diversity of hardware platforms brought about by the growth of ARM, RISC-V and the open software ecosystem presents unprecedented opportunities to product…
SOC Verification Flows and Methodologies | Sivakumar P R, Maven SiliconWe need more and more complex chips and SoCs for all new applications that use the latest technologies like AI. For example, Apple’s 5nm SoC…
How will you share your RISC-V knowledge and wisdom? | RISC-V InternationalThe Call for Proposals for the RISC-V Global Summit in San Jose California closes in just 10 days! Whether you work at a leading research…
No recent posts listed
Tiempo Secure becomes a Strategic Member of RISC-V International | Tiempo SecureAs a Strategic member of RISC-V International, Tiempo Secure will secure and integrate processors implementing the RISC-V open standard instruction set architecture (ISA) into its TESIC Secure Element…
RiVAI Technologies Announced New Products in Their RISC-V Vector DSP IP Family: RiVAI V7 And RiVAI V9+ | RiVAI TechnologiesRiVAI Technologies has recently launched two new high-performance RISC-V vector IP series products: RiVAI V7 and RiVAI V9+, both with a customized RVV extension optimizing…
Make the Most of Rad-Hard RTG4 FPGAs with the Right Approach to Timing and Resets | Microchip TechnologyDevelopers need to consider timing penalties when using rad-hard parts like our RTG4™ FPGAs. Choosing the right way to apply resets can help you optimize…
RISC-V International Announces Agenda for RISC-V Summit 2022 | RISC-V InternationalThis year’s Summit includes keynotes, technical and industry tracks and tutorials, as well as member exhibitions, networking opportunities and more RISC-V International will host…
Announcing RISC-V International’s Expanded Developer Boards Program | RISC-V InternationalThe RISC-V Developer Boards program drives RISC-V innovation by making development boards more accessible to the global RISC-V community. Read on to learn how the…
DeepComputing and Xcalibyte announce the ROMA laptop will be powered by TH1520 – the first SoC from Wujian 600’s platform by Alibaba T-Head | XcalibyteAlibaba T-Head recently released a brand-new high-performance RISC-V SoC named the TH1520 at The RISC-V Summit China 2022. According to Alibaba “TH1520 demonstrates exceptional speed…
XuanTie Security System Promotes Rapid Migration of Security Applications from Arm to RISC-V | Vincent Cui, Alibaba CloudRecently at the RISC-V Summit China 2022 a new high-performance RISC-V-based chip platform named Wujian 600 and the TH1520 chip prototype was revealed. These products…
Customising PolarFire® SoC FPGA for International Space Station Mission | Microchip TechnologyOur Mi-V Ecosystem partner Emdalo Technologies Ltd. (Emdalo) has successfully customised PolarFire® SoC FPGA Linux® and associated boot flow for Skycorp Inc.’s recent space-mission on…
Cortus Announces the Launch of its New Secure Low Power RISC-V Microcontrollers | Cortus S.A.SCortus, an innovative French fabless semiconductor company today announces the availability of its secure low power RISC-V microcontrollers (MCUs) that address consumer products and automotive…
Renodepedia – From Zephyr’s structured data to traceable and testable open hardware with Renode | AntmicroThe abundance and diversity of hardware platforms brought about by the growth of ARM, RISC-V and the open software ecosystem presents unprecedented opportunities to product…
SOC Verification Flows and Methodologies | Sivakumar P R, Maven SiliconWe need more and more complex chips and SoCs for all new applications that use the latest technologies like AI. For example, Apple’s 5nm SoC…
How will you share your RISC-V knowledge and wisdom? | RISC-V InternationalThe Call for Proposals for the RISC-V Global Summit in San Jose California closes in just 10 days! Whether you work at a leading research…