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Addition of Single Precision Floating Point (F) extension in NucleusRV: RISC-V based RV32-IMC Core

Linux Foundation Mentorship Spring 2023 at Micro Electronics Research Lab (MERL) sponsored by RISC-V International Abstract The goal of the project is to improve the…

When tapas meet tech: Barcelona’s RISC-V Summit feeds our appetite for innovation

By Brett Cline, Codasip Alright, let's talk about Barcelona. Now, you might be thinking of mouthwatering tapas, smooth local wines, and the pulsing life in…

Integrating Tile Link UH in the Caravan Framework: A Journey of Enhanced Functionality

We are thrilled to share the details of our recent project, where we successfully integrated Tile Link UH (Ultra High) into the Caravan framework. Tile…

Safety Critical Real-Time Operating System, SAFERTOS® Available With MiV_RV32 Soft CPU

SAFERTOS® is a real-time operating system (RTOS) designed specifically for use in safety-critical systems. WITTENSTEIN high integrity systems is a Mi-V Ecosystem Partner of Microchip…

SOPHGO Donates 50 RISC-V Motherboards – Learn More About the Pioneer Box

New RISC-V International member SOPHGO is committed to the development and promotion of AI RISC-V CPU and other computing products. RISC-V member Milk-V delivers high-quality…

NOEL-V Processor’s Security Extensions for Safe and Secure Computing

Safety and security are increasingly important aspects when designing computer systems, and work is carried out within RISC-V International technical groups to establish specifications that…

RISC-V International Newsletter – May/June 2023

Message from RISC-V International The growth and reach of the RISC-V ecosystem continues to inspire me during 2023! We are seeing incredible adoption across a…

NOEL-V: A RISC-V Processor for High-Performance Space Applications

Space applications pose significant challenges for electronic systems as they must contend with a myriad of environmental factors once they are launched. These factors include…

RISC-V: An Open Standard Instruction Set Architecture

By Mark Himelstein, CTO of RISC-V International In this blog post, we’ll explain why RISC-V is an open standard instruction set architecture (ISA). We’ve received…

RISC-V Announces Agenda for 2023 RISC-V Summit Europe

The first-ever RISC-V Summit Europe includes keynotes, technical talks, working groups, poster sessions, networking opportunities, and more    RISC-V International will host its first annual…

RISC-V and the Future of Machine Learning Computing

By: Charlie Cheng, Managing Director of Polyhedron LLC Andes Technology Corp. was founded in 2004 and is headquartered in Taiwan, with a significant presence in…

Co-developing RISC-V AI solutions using Vector Extensions in Renode with Kenning

Kenning helps develop real-world Machine Learning solutions for ARM and RISC-V platforms such as NVIDIA Jetson AGX Orin, Google Coral or HiFive Unmatched by seamlessly…

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TRACE32® on XuanTie CPUs | LiFeng, Alibaba and Frank Xing, Lauterbach China

Recently, Lauterbach, a microprocessor development tool manufacturer, has implemented a new support for T-Head XuanTie processors. Its TRACE32® debugging tool now maintains the XuanTie 9…

RISC-V International and Intel team up to accelerate RISC-V adoption: Introducing Intel Pathfinder for RISC-V | Intel Corporation

A brief background Founded in 2015 with only 29 members, the RISC-V Foundation, a nonprofit organization, was chartered to standardize and promote the free and…

StarFive Announced 2 High-Performance RISC-V Products: JH7110 SoC and VisionFive 2 SBC | StarFive

August 23 witnessed a significant breakthrough in the RISC-V industry. StarFive, the leader of the RISC-V software and hardware ecosystem, held its 2022 online Product…

Canonical enables Ubuntu on Allwinner’s Nezha RISC-V boards | Canonical

After our previous announcement on the availability of Ubuntu running on RISC-V processors and hardware, we are proud to announce the Ubuntu release for additional RISC-V hardware…

Versatile, Compact and High-Performance TySOM-M Embedded Development Board Based on PolarFire® SoC FPGA Device | Microchip Technologies

High-Performance FPGA Development Platform With Hardened RISC-V Cores With the increasing adoption of RISC-V cores into a wide range of applications that require low power…

Alibaba Cloud Unveils Chip Development Platform to Support Developers with RISC-V based High-Performance SoCs | Alibaba Cloud

Hangzhou, China, August 24, 2022 - Alibaba Cloud, the digital technologies and intelligence backbone of Alibaba Group, has unveiled its latest chip development platform, named…

Canonical enables Ubuntu on StarFive’s VisionFive RISC-V boards | Ubuntu Blog, Canonical

In 2021, we announced the first availability of Ubuntu running on RISC-V processors and hardware. However, the endeavor didn’t stop. Now we are proud to announce the…

T-Head DSA design in RISC-V | Chaojun Zhao, Alibaba Cloud

To get better performance or lower power consumption for specific applications an acceleration ASIC IP will be added to the traditional SoC design. The ASIC…

RISC-V Summit China 2022 Announces Agenda | RISC-V International

2nd RISC-V Summit in China will be broadcast online with 12 concurrent in-person events in leading technology cities throughout the country; 100,000 online viewers expected…

Defend Your Devices Against a Common and Insidious Hack With seL4 | Microchip Technologies

How Secure is Your Software? It’s a simple question with—perhaps all too often—a complex answer. A more telling question may be: just how quickly can…

Welcoming RISC-V International Board Members

Welcome to Our New Elected RISC-V Board Members By Calista Redmond, CEO RISC-V International, August 1, 2022 We are honored to share the results of…

Architectures for Matrix Extension in CPU | Jiang Zhao, Alibaba Cloud

Recent rapid development of various applications represented by Deep Learning (DL) calls for a much-needed increase in established chip matrix computing capability. Therefore, CPU manufacturers…

TRACE32® on XuanTie CPUs | LiFeng, Alibaba and Frank Xing, Lauterbach China

Recently, Lauterbach, a microprocessor development tool manufacturer, has implemented a new support for T-Head XuanTie processors. Its TRACE32® debugging tool now maintains the XuanTie 9…

RISC-V International and Intel team up to accelerate RISC-V adoption: Introducing Intel Pathfinder for RISC-V | Intel Corporation

A brief background Founded in 2015 with only 29 members, the RISC-V Foundation, a nonprofit organization, was chartered to standardize and promote the free and…

StarFive Announced 2 High-Performance RISC-V Products: JH7110 SoC and VisionFive 2 SBC | StarFive

August 23 witnessed a significant breakthrough in the RISC-V industry. StarFive, the leader of the RISC-V software and hardware ecosystem, held its 2022 online Product…

Canonical enables Ubuntu on Allwinner’s Nezha RISC-V boards | Canonical

After our previous announcement on the availability of Ubuntu running on RISC-V processors and hardware, we are proud to announce the Ubuntu release for additional RISC-V hardware…

Versatile, Compact and High-Performance TySOM-M Embedded Development Board Based on PolarFire® SoC FPGA Device | Microchip Technologies

High-Performance FPGA Development Platform With Hardened RISC-V Cores With the increasing adoption of RISC-V cores into a wide range of applications that require low power…

Alibaba Cloud Unveils Chip Development Platform to Support Developers with RISC-V based High-Performance SoCs | Alibaba Cloud

Hangzhou, China, August 24, 2022 - Alibaba Cloud, the digital technologies and intelligence backbone of Alibaba Group, has unveiled its latest chip development platform, named…

Canonical enables Ubuntu on StarFive’s VisionFive RISC-V boards | Ubuntu Blog, Canonical

In 2021, we announced the first availability of Ubuntu running on RISC-V processors and hardware. However, the endeavor didn’t stop. Now we are proud to announce the…

T-Head DSA design in RISC-V | Chaojun Zhao, Alibaba Cloud

To get better performance or lower power consumption for specific applications an acceleration ASIC IP will be added to the traditional SoC design. The ASIC…

RISC-V Summit China 2022 Announces Agenda | RISC-V International

2nd RISC-V Summit in China will be broadcast online with 12 concurrent in-person events in leading technology cities throughout the country; 100,000 online viewers expected…

Defend Your Devices Against a Common and Insidious Hack With seL4 | Microchip Technologies

How Secure is Your Software? It’s a simple question with—perhaps all too often—a complex answer. A more telling question may be: just how quickly can…

Welcoming RISC-V International Board Members

Welcome to Our New Elected RISC-V Board Members By Calista Redmond, CEO RISC-V International, August 1, 2022 We are honored to share the results of…

Architectures for Matrix Extension in CPU | Jiang Zhao, Alibaba Cloud

Recent rapid development of various applications represented by Deep Learning (DL) calls for a much-needed increase in established chip matrix computing capability. Therefore, CPU manufacturers…