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CHIPS Alliance and RISC-V International Invite the RISC-V Community to Participate in Updating a New Unified Memory Architecture Standard

New joint working group will enhance the OmniXtend Cache Coherency architecture SAN FRANCISCO, March 24, 2020 – RISC-V International, a non-profit corporation controlled by its…

A RISC-V ISA Extension For Ultra-Low Power IoT Wireless Signal Processing | Semiconductor Engineering

An instruction-set extension to the open-source RISC-V ISA (RV32IM) dedicated to ultra-low power (ULP) software-defined wireless IoT transceivers. Read the full article.

Intel’s tilt to foundry opens a door to upstart RISC-V technology | Tiernan Ray, ZDNet

SiFive, a startup that has been developing intellectual property for chips based on the RISC-V standard, said Intel will make its designs available to Intel's…

Efinix FPGAs with Sammy Cheung | The Amp Hour Electronics Podcast

Welcome Sammy Cheung, CEO of Efinix! Visit the Podcast page.

Made in Thailand CorgiDude RISC-V AI board aims to teach machine learning | Jean-Luc Aufranc (CNXSOFT)

There’s a relatively small but active maker community in Thailand, and we’ve covered or even reviewed some made in Thailand boards including ESP8266 and ESP32…

Check out the new RISC-V Careers page and RISC-V Mentorship program!

We are excited to announce the new RISC-V Careers page and RISC-V Mentorship program! As the RISC-V ecosystem and community grow, we’re bringing together those…

Formal Verification Keystore | Dr. Jaap Boender, Formal Verification Engineer at HENSOLDT Cyber

In a previous blog post, we talked about formal verification and how we can convince ourselves (and others!) that a piece of software really works…

SiFive, ArchiTek Announce High-Efficiency Sub-1W Edge AI Processor, the AiOnIc | Gareth Halfacree, hackster.io

New part makes impressive efficiency claims, but is currently available only as a prototype chip with pricing yet to be confirmed. SiFive, a pioneer of…

Video: LeaRnV: a RISC-V based Embedded System Design Framework for Education and Research Development | TIMA Laboratory

Designing a modern System on a Chip is based on the joint design of hardware and software (co-design). However, understanding the tight relationship between hardware…

Formal Verification | Dr. Jacob Boender, Formal Verification Engineer at HENSOLDT Cyber GmbH

One of the specialties of HENSOLDT Cyber is *formal verification*. This may sound very sophisticated, but what is it exactly? In this blog, we will…

FOSSi Fever 2020

2020 was a year with a lot of bad news and so it feels slightly strange to cheerfully write about a very specific topic in…

Video: RISC-V Application to Machine Language | Maven Silicon

This video explains how a RISC-V processor executes all the software applications written in the high-level language in terms of its machine language. To know…

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RISC-V’s CPU Verification Challenge | EEWeb

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Imagination Announces the First RISC-V Computer Architecture Course

“RVfpga: Understanding Computer Architecture” includes teaching materials and hands-on exercises for students London, England; 2nd September 2020 – Imagination Technologies announces a complete course on RISC-V computer architecture…