Thank You For Attending RISC-V Summit North America! | Missed the event? Watch Now.

No recent posts listed
A Look Back At 2020: Another Strong Year Of Growth For Andes Despite The Pandemic | Andes Technology

In 2020, although the COVID-19 pandemic had a severe impact on the global economy, Andes Technology still made significant advances and achievements in the development…

HANDS-ON: THE RISC-V ESP32-C3 WILL BE YOUR NEW ESP8266 | Elliot Williams, Hackaday

We just got our hands on some engineering pre-samples of the ESP32-C3 chip and modules, and there’s a lot to like about this chip. The question…

RISC-V: Q&A with SiFive head of global communications James Prior | Judy Lin, DIGITIMES

RISC-V has grabbed headlines recently as the open-source technology is now viewed as a hotbed for innovation. It is also a source of intellectual properties…

Hardware Description Language Chisel & Diplomacy Deeper dive

Are you using Chisel? A hardware building language based on Scala. Not a high-level synthesis language. SiFive's RISC-V IP use Chisel Rocket-Chip : https://github.com/chipsalliance/rocket-chip BOOM : https://github.com/riscv-boom/riscv-boom…

“Open ISAs (RISC-V, OpenPOWER, etc)” – Alistair Francis, Hugh Blemings (LCA 2021 Online) | linux.conf.au

The recent phenomenal growth of RISC-V and OpenPOWER proves that Open CPU architectures are no longer only an academic project but are a serious contender…

Securing RISC-V-Based Systems | Max Maxfield, Electronic Engineering Journal

In just a moment we are going to cogitate and ruminate over the question of how to secure our RISC-V-based systems, but first… Deep in…

Electronic industry trends for 2021 | Dunstan Power, newelectronics

The world has never experienced such a year. With the global pandemic have come new norms for how we live such as a proliferation of…

Precursor: Mobile, Open Hardware, RISC-V System-on-Chip (SoC) Development Kit | Tech5

Made For a Lab. Fits in a Pocket. Verifiable by Design.Precursor is an open hardware development platform for secure, mobile computation and communication. This pocket-sized…

RISC-V Processor Designs Emerge | Majeed Ahmad, EETimes

Open source hardware based on RISC-V processor designs has a bit of drift compared to its software counterpart: The framework freezes instruction set architecture (ISA)…

Can Open Source Hardware Emulate Linux? | Nitin Dahad, eeTimes

This year marks the 30th anniversary of the Linux kernel’s release. Serving as the basis of the open source software movement, the open source code spawned…

Formal bytes Episode 40: A fireside chat with Dr. Zvonimir Bandic | Axiomise Formal Verification Channel

In this episode, Dr. Darbari talks to a key leader in the field of the RISC-V ecosystem - Dr. Zvonimir Bandic - Senior Director, Western…

Open Source: It’s Not Just for Software Anymore | Kevin Krewell, EETimes

“Open Source” has multiple meanings in the context of hardware designs: an open specification, open/free design files/RTL, designs with expired patent/copyright protection, designs that were…

No recent posts listed
No recent posts listed
No recent posts listed
RISC Simulator By Peter Higginson

It’s time to take the UltraSoC vision to the next level: design for product lifecycle

The post It’s time to take the UltraSoC vision to the next level: design for product lifecycle appeared first on UltraSoC.]]>

Siemens acquires UltraSoC to drive design for silicon lifecycle management

The post Siemens acquires UltraSoC to drive design for silicon lifecycle management appeared first on UltraSoC.]]>

International Women in Engineering Day: things are changing

International Women in Engineering Day: things are changing appeared first on UltraSoC.]]>

Intel's Security Woes Continue | DJ Ware