Veyron Solution — World’s Highest Performance Data RISC-V Processor and Platform — Will Be Showcased Throughout Event CUPERTINO, Calif. – June 24, 2024 – Ventana…
RISC-V International Names Andrea Gallo as VP, TechnologyIndustry Veteran Brings Software and Hardware Experience to Role Guiding all RISC-V Technical Activities MUNICH, Germany – June 24, 2024 – RISC-V International, the global…
AI, Collaboration, Security and More: Women Speak on Key Topics at RISC-V Summit InternationalIn recognition of International Women in Engineering Day on June 23, we want to shine the spotlight on some of the outstanding women in the…
RISC-V is an open standard instruction set architecture that has potential to be widely used as an alternative to existing ARM and x86 solutions. For…
Industry-leading RISC-V solutions and live demonstrations of CPU IP are all on display at Booth #8. Discover the latest advancements from Andes’ presentations and posters!…
RISC-V in Brazil: Leading the Open Compute Era in Latin AmericaOn June 14th, 2024, the Eldorado Research Institute in Campinas, São Paulo, hosted the RISC-V Brazil event. This gathering brought together over 200 professionals, researchers,…
Breker Verification Systems Readies RISC-V CoreAssurance and SoCReady SystemVIP for Automated, Certification-level RISC-V Verification CoverageSAN JOSE, Calif., June 20, 2024 (GLOBE NEWSWIRE) -- Breker Verification Systems, whose product portfolio solves challenges across the functional and system verification process for large,…
Companies Rally RISC-V Support for AI and HPC ApplicationsAs RISC-V gains traction as an open-source alternative to Arm, several companies have announced partnerships and research to bolster the ISA. Forecasts show that AI…
[VIDEO] M1: RISC-V Overview | The Ultimate Guide to RISC-V ArchitectureWelcome to the Ultimate Guide to RISC-V Architecture. In this course, our Founder and CEO, Mr. P R Sivakumar, explains the layered architecture of RISC-V…
Follow the Leader – Synopsys Provides Broad Support for Processor EcosystemsSynopsys has expanded its ARC processor portfolio to include a family of RISC-V processors. This was originally reported on SemiWiki last October. There is also a…
Sipeed Univels the Lichee Book 4A, a Notebook for the “RISC-V Explorer”Sipeed has announced a new entry in its Lichee RISC-V family, this time putting its high-performance Lichee 4A RISC-V system-on-module into a full-size laptop chassis:…
Functional safety static analysis tool for RISC-VThe IAR safety-certified C-STAT tool is now available in the Functional Safety editions of IAR Embedded Workbench for RISC-V, ARM, and Renesas RL78 architectures. The…
Semidynamics has released its new tool called ‘Configurator’ that puts the power of Semidynamics’ full customisation of a RISC-V processor core in the hands of…
In this installment of SBT's C-Suite Spotlight, President Justin Kinsey has a conversation with CEO of RISC-V International, Calista Redmond. Calista's early career was focused…
SHANGHAI--(BUSINESS WIRE)--VeriSilicon (688521.SH) today announced that HPMicro’s HPM6800 series, a new generation digital dashboard display and human-machine interface system application platform has adopted VeriSilicon’s high-performance…
Imsys develops RISC-V core, looks to AI in spaceImsys in Sweden has developed a RISC-V processor core and is part of a project to develop an AI accelerator in space. Imsys points to…
Scaleway launches its RISC-V servers in the cloud, a world first and a firm commitment to technological independenceParis, France - Thursday, February 29, 2024 - Scaleway, the European cloud provider, is proud to launch a range of RISC-V servers, marking once again its…
1.8 Billion Heterogenous AI Chipsets by 2030, 129 Million RISC-V AI Shipments by 2030 and 36 Other Transformative Technology Stats You Need to KnowThe technology community – both innovators and implementers – is at a critical juncture in 2024. Global market pressures are starting to ease, but persistent…
Andes and MachineWare Collaborate on Early RISC-V Software Development for AndesCore™ AX45MPVAachen, Germany and Hsinchu, Taiwan, February 27th 2024 MachineWare GmbH and Andes Technology (TWSE:6533), a leading supplier of high-efficiency, low-power 32/64-bit RISC-V processor cores and Founding…
Tenstorrent Scores Big Design Win With Japan’s LTSC To Enable Leading-Edge 2nm AI AcceleratorJapan’s Leading-edge Semiconductor Technology Center, or LSTC, was established in late 2022 and is tasked with advancing the country’s research and innovation in areas such…
[PODCAST] Leading the RISC-V Revolution, SiFive Aims to Take the Computing Industry ThroneSiFive is helping lead the RISC-V revolution in automotive, Android, and AI. Senior VP Jack Kang joins the Moore’s Lobby podcast to provide his insights…
Tenstorrent RISC-V and Chiplet Technology Selected to Build the Future of AI in JapanSANTA CLARA, Calif., Feb. 27, 2024 /PRNewswire/ -- Tenstorrent is pleased to announce a multi-tiered partnership deal with Japan's Leading-edge Semiconductor Technology Center (LSTC), which selected Tenstorrent's world-class RISC-V…
Feb 23, 2023 SILICON VALLEY, CA, USA. Ashling and MIPS announced today that Ashling’s RiscFree SDK is now available with full support for MIPS RISC-V…
Feb 22, 2024 — RISC-V IP vendor Andes Technology and edge computing chip provider MetaSilicon jointly announced that the MetaSilicon MAT Series is the world’s first automotive-grade…