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Safety Critical Real-Time Operating System, SAFERTOS® Available With MiV_RV32 Soft CPU
The RISC-V Report – interviewing the key players (2017-2023)
Agile Analog launches first complete RISC-V analog IP subsystemComplete RISC-V analog IP subsystem targets IoT | Jean-Pierre Joosting, EE News Europe
Newly Revealed RISC-V Vector Unit Could Be Used for AI, HPC, GPU Applications | Anton Shilov, Tom’s Hardware
SOPHGO Donates 50 RISC-V Motherboards – Learn More About the Pioneer Box
Ventana to Deliver Keynote at RISC-V Summit Europe | Yahoo! Finance
Adding RISC-V Vector Cryptography Extension support to QEMU
Consortium’s Move Will Boost RISC-V Ecosystem, Thankfully | Steve Leibson , EE Times
Alibaba’s T-Head joins global initiative to develop RISC-V software ecosystem, along with Intel, Qualcomm and Nvidia | Ann Cao, South China Morning Post
Milk-V Duo is a $9.00 RISC-V tiny embedded computer | Giorgio Mendoza , Linux Gizmos
RISE project gives RISC-V an open source software lift | Nitin Dahad, Embedded.com
Imperas and Imagination Collaborate on Providing Virtual Platform Models for the Catapult RISC-V CPU Family
Codasip Launches Codasip Labs to Accelerate Advanced Technologies
Andes Announces RISC-V Multicore 1024-Bit Vector Processor: AX45MPV
Andes Technology Unveils The AndesCore™ D23, A Feature-Rich, Low-Power And Highly-Secured Entry-Level RISC-V Processor
Join Andes At RISC-V Summit; Learn The Only ISO 26262 Fully-Compliant RISC-V CPU, The Latest Multicore 4-Way Out-Of-Order Processor & The Multicore 1024-Bit Vector Processor
Andes Technology And Parasoft Collaborate To Provide Seamless Software Testing Tools For Automotive Functional Safety ApplicationsMIPS Selects Imperas for Advanced Verification of High-Performance RISC-V Application-class Processors
Standard Library Expertise at the RISC-V Summit Presented by Solid Sands
RISC-V: An Open-Source Churn In Computational Hardware Electronics – Part 2 | Dr Santhosh Onkar, SwarajyaImperas and Andes collaborate to support RISC-V innovations | Andes Technology and Imperas Software
UniHiker education platform teaches STEM with Mind+ and Jupyter (in China) | Jean-Luc Aufranc, CNX Software
CEVA joins Intel Pathfinder for RISC-V programme | CEVA, New Electronics
Safety Critical Real-Time Operating System, SAFERTOS® Available With MiV_RV32 Soft CPUSAFERTOS® is a real-time operating system (RTOS) designed specifically for use in safety-critical systems. WITTENSTEIN high integrity systems is a Mi-V Ecosystem Partner of Microchip…
The RISC-V Report – interviewing the key players (2017-2023)Take time for the The RISC-V Summit in Barcelona and connect the dots of this Open Instruction Set Architecture In 2017 we had the opportunity…
Agile Analog launches first complete RISC-V analog IP subsystemAgile Analog has brought together its customisable IP blocks to create the first complete analog IP subsystem for battery-powered RISC-V chips. The initial subsystem includes…
Complete RISC-V analog IP subsystem targets IoT | Jean-Pierre Joosting, EE News EuropeAgile Analog is offering the first complete analog IP subsystem for RISC-V applications at the RISC-V Summit Europe in Barcelona. The initial subsystem includes all the analog…
Newly Revealed RISC-V Vector Unit Could Be Used for AI, HPC, GPU Applications | Anton Shilov, Tom’s HardwareSemidynamics announces high-performance RISC-V IP. Semidynamics has introduced one of the industry's first RISC-V vector units that could be used for highly parallel processors, such as those…
SOPHGO Donates 50 RISC-V Motherboards – Learn More About the Pioneer BoxNew RISC-V International member SOPHGO is committed to the development and promotion of AI RISC-V CPU and other computing products. RISC-V member Milk-V delivers high-quality…
Ventana to Deliver Keynote at RISC-V Summit Europe | Yahoo! FinanceVentana Micro Systems Inc., provider of the highest performance RISC-V processors, today announced its Founder and CEO Balaji Baktha is providing the RISC-V Summit Europe keynote speech…
Adding RISC-V Vector Cryptography Extension support to QEMURISC-V is an open source instruction set architecture (ISA) based on reduced instruction set computer (RISC) principles. Codethink has been working with the RISC-V CPU…
Consortium’s Move Will Boost RISC-V Ecosystem, Thankfully | Steve Leibson , EE TimesRISC-V represents an existential threat to Arm, and a new industry consortium plans to increase that threat of extinction by accelerating the development of open-source…
Alibaba’s T-Head joins global initiative to develop RISC-V software ecosystem, along with Intel, Qualcomm and Nvidia | Ann Cao, South China Morning PostT-Head, the chip unit of Alibaba Group Holding, has joined a global initiative to develop a software ecosystem and accelerate commercialisation for RISC-V, as the…
Milk-V Duo is a $9.00 RISC-V tiny embedded computer | Giorgio Mendoza , Linux GizmosThe Milk-V Duo is a small RISC-V embedded platform capable of running Linux and RTOS. The low-cost device features up to 26x GPIOs, optional 10/100Mbps Ethernet…
RISE project gives RISC-V an open source software lift | Nitin Dahad, Embedded.comRISC-V Software Ecosystem (RISE) project brings together key players in the ecosystem with a governing board that includes Andes, Google, Intel, Imagination Technologies, MediaTek, Nvidia,…
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Imperas and Imagination Collaborate on Providing Virtual Platform Models for the Catapult RISC-V CPU FamilyOxford, United Kingdom – December 8th, 2022 – Imperas Software Ltd.,the leader in RISC-V simulation solutions, today announced that Imagination Technologies, a global technology leader in silicon IP…
Codasip Launches Codasip Labs to Accelerate Advanced TechnologiesMunich, Germany – December 7, 2022 – Codasip, the leader in processor design automation and RISC-V processor IP, today announced the establishment of Codasip Labs as…
Andes Announces RISC-V Multicore 1024-Bit Vector Processor: AX45MPVSAN JOSE, CA – December 7, 2022 – Andes Technology Corporation (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099), a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and…
Andes Technology Unveils The AndesCore™ D23, A Feature-Rich, Low-Power And Highly-Secured Entry-Level RISC-V ProcessorSAN JOSE, CA - December 7, 2022 - Andes Technology Corporation (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099), a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and…
Join Andes At RISC-V Summit; Learn The Only ISO 26262 Fully-Compliant RISC-V CPU, The Latest Multicore 4-Way Out-Of-Order Processor & The Multicore 1024-Bit Vector ProcessorSAN JOSE, CA – December 7, 2022 – Andes Technology Corporation (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099), a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and…
Andes Technology And Parasoft Collaborate To Provide Seamless Software Testing Tools For Automotive Functional Safety ApplicationsSAN JOSE, CA - December 7, 2022 - Andes Technology, a leading supplier of high-performance, low-power 32/64-bit RISC-V processor cores and founding premier member of RISC-V…
MIPS Selects Imperas for Advanced Verification of High-Performance RISC-V Application-class ProcessorsOxford, United Kingdom – December 7th, 2022 – Imperas Software Ltd.,the leader in RISC-V simulation solutions, announced today that MIPS, a leading developer of highly scalable RISC…
Standard Library Expertise at the RISC-V Summit Presented by Solid SandsAmsterdam, The Netherlands – December 6, 2022 – Solid Sands, the world-leading provider of testing and qualification technology for compilers and libraries, will share its knowledge…
RISC-V: An Open-Source Churn In Computational Hardware Electronics – Part 2 | Dr Santhosh Onkar, SwarajyaThe previous article was a ‘look back’ at the computation paradigm and the context in which RISC-V has emerged as a new player. In this article, we…
Imperas and Andes collaborate to support RISC-V innovations | Andes Technology and Imperas SoftwareImperas reference models for Andes expanded with Andes Custom Extension™ support and design flow integration for leading EDA environments, plus new AndesCore® N25F-SE core for…
UniHiker education platform teaches STEM with Mind+ and Jupyter (in China) | Jean-Luc Aufranc, CNX SoftwareDFRobot UniHiker is a STEM education platform with a 2.8-inch touchscreen display, a Rockchip RK3308 quad-core Cortex-A35 processor, a GD32V RISC-V microcontroller, WiFi and Bluetooth…
CEVA joins Intel Pathfinder for RISC-V programme | CEVA, New ElectronicsCEVA, a licensor of wireless connectivity and smart sensing technologies, is to make its CEVA-BX1 and CEVA-BX2 Audio DSPs and audio front-end software stack available…