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Yunhao Zhang’s Egos-2000 Packs an Entire RISC-V Operating System Into Just 2,000 Lines of Code
How to Speed Up the Emulating Process with Pydrofoil | Carl Friedrich and Matti Picus
Chip War Without Soldiers
“Risc” V Opportunity: How The Custom Silicon Wave Will Benefit India’s Semiconductor Ambitions
Esperanto Sees A Bright Future For RISC-V In AI And HPCUbuntu Now Available on the World’s First High-Performance RISC-V SBC with GPU
Canonical enables Ubuntu on StarFive’s VisionFive 2 RISC-V single board computer
Compiler test update boosts Andes RISC-V in automotive
[WEBINAR] Taking the Risk out of Developing Your Own RISC-V Processor with Fast, Architecture-Driven, PPA OptimizationArt Swift, President and CEO of Esperanto Technologies, on RISC-V, HPC, AI, and Generative AI.
Canonical enables Ubuntu on StarFive’s VisionFive 2 RISC-V single board computer
Launch of the New Horizon Europe Project SYCLOPS
10 cents CH32V003 RISC-V MCU offers 2KB SRAM, 16KB flash in SOP8 to QFN20 packages | Jean-Luc Aufranc, CNX Software
Rise of RISC-V: The computer chip design you need to know about | Stephen Vicinanza, Interesting Engineering
Google Announces New Open-source OS for RISC-V Chips | Darshil Patel, All About Circuits
Ubuntu 22.10 Released With Improved Steam App, GNOME 43, RISC-V Support | Ian Evenden, Tom’s HardwareEspressif ESP8684 RISC-V WiFi & BLE MCU embeds up to 4MB flash in a 4x4mm package | Jean-Luc Aufranc, CNX Software
Google comes up with new OS for RISC-V | Nick Farrell, Fudzilla
‘First’ RISC-V CPU certified compliant with ISO 26262 | Steve Bush, Electronics Weekly
Ox64 SBC powered by dual RISC-V processors | Giorgio Mendoza, Linux Gizmos
Andes Announces the N25F-SE Processor, the World First RISC-V CPU IP with ISO 26262 Full Compliance | Yahoo! Finance
IAR Systems’ Functional Safety Certified Development Tools for RISC-V support latest SiFive Automotive Solutions | IAR SystemsIAR boosts its automotive RISC-V support | Nick Flaherty, EE News EuropeOx64 SBC powered by dual RISC-V processors | Giorgio Mendoza, Linux Gizmos
Yunhao Zhang’s Egos-2000 Packs an Entire RISC-V Operating System Into Just 2,000 Lines of CodeSoftware engineer and Cornell PhD candidate Yunhao Zhang has developed an operating system with a difference: packing its features into just 2,000 lines of code,…
How to Speed Up the Emulating Process with Pydrofoil | Carl Friedrich and Matti PicusThe RISC-V Golden model, also called the Sail model, defines the instruction execution of the RISC-V architecture. As such, it is useful for evaluating the…
Chip War Without SoldiersAuthor: P R Sivakumar, Founder and CEO, Maven Silicon LinkedIn Profile: https://www.linkedin.com/in/sivapr/ Every country realizes the importance of producing skilled chip designers who could decide…
“Risc” V Opportunity: How The Custom Silicon Wave Will Benefit India’s Semiconductor Ambitions"We believe that India will become a global semiconductor leader by 2035, with many large companies in key industry segments, such as core IP and…
Esperanto Sees A Bright Future For RISC-V In AI And HPCThe company is shipping its first-gen chip globally, with over 1000 cores at only 25 watts of power. Can it break into Generative AI? Read…
Ubuntu Now Available on the World’s First High-Performance RISC-V SBC with GPUStarFive VisionFive 2 can now benefit from the latest and greatest Ubuntu release, improving RISC-V board experiences. Read the full article.
Canonical enables Ubuntu on StarFive’s VisionFive 2 RISC-V single board computerMay 11, 2023 -- Canonical published the optimized Ubuntu release for StarFive’s VisionFive 2, the world’s first high-performance RISC-V single board computer (SBC) with an integrated GPU. Read the…
Compiler test update boosts Andes RISC-V in automotiveAndes Technology has upgraded its version of the SuperTest Compiler Test and Validation Suite developed and supplied by Solid Sands in the Netherlands to support…
[WEBINAR] Taking the Risk out of Developing Your Own RISC-V Processor with Fast, Architecture-Driven, PPA OptimizationAre you developing or thinking about developing your own RISC-V processor? You’re not alone. The use of the RISC-V ISA to develop processors for SoCs…
Art Swift, President and CEO of Esperanto Technologies, on RISC-V, HPC, AI, and Generative AI.Karl interviews Art Swift, President and CEO of Esperanto Technologies. The company is now shipping a RISC-V SoC with over 1000 cores that consumes only…
Canonical enables Ubuntu on StarFive’s VisionFive 2 RISC-V single board computerMay 10, 2023: Canonical published the optimised Ubuntu release for StarFive’s VisionFive 2, the world’s first high-performance RISC-V single board computer (SBC) with an integrated…
Launch of the New Horizon Europe Project SYCLOPS8 leading European organisations join forces to bring together RISC-V and SYCL standards to demonstrate ground-breaking advances in scalability of extreme data analytics via fully-open…
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10 cents CH32V003 RISC-V MCU offers 2KB SRAM, 16KB flash in SOP8 to QFN20 packages | Jean-Luc Aufranc, CNX SoftwareWCH CH32V003 is a new ultra-cheap RISC-V microcontroller (MCU) clocked at 48 MHz with 2KB SRAM, 16KB flash, and a bunch of interfaces that sells…
Rise of RISC-V: The computer chip design you need to know about | Stephen Vicinanza, Interesting EngineeringIE speaks to RISC-V team that has already shipped more than 10 Billion cores across the globe. The RISC-V is relatively a new chip in town (pronounced…
Google Announces New Open-source OS for RISC-V Chips | Darshil Patel, All About CircuitsUsing a new Rust-based operating system, Google aims to secure ambient machine learning on embedded hardware. Researchers at Google recently announced a mathematically-secure platform, KataOS, optimized for…
Ubuntu 22.10 Released With Improved Steam App, GNOME 43, RISC-V Support | Ian Evenden, Tom’s HardwareKinetic Kudu is finally here. The latest release of popular Linux distribution Ubuntu 22.10 has been announced for general release. This time there's quite a lot that’s…
Espressif ESP8684 RISC-V WiFi & BLE MCU embeds up to 4MB flash in a 4x4mm package | Jean-Luc Aufranc, CNX SoftwareEspressif Systems ESP8684 is a single-core RISC-V microcontroller with 2.4 GHz WiFi 4 and Bluetooth 5.0 LE (BLE) connectivity that also integrates 1, 2, or…
Google comes up with new OS for RISC-V | Nick Farrell, FudzillaKataOS is more secure Search engine outfit Google has shown off its KataOS, a new secure operating system for embedded open-source RISC-V chips. Google's KataOS…
‘First’ RISC-V CPU certified compliant with ISO 26262 | Steve Bush, Electronics WeeklyAndes Technology has introduced safety-enhanced RISC-V CPU intellectual property, claiming it to be “the first to certified to be fully compliant with ISO 26262 functional…
Ox64 SBC powered by dual RISC-V processors | Giorgio Mendoza, Linux GizmosPine64 announced a few days ago their latest SBC based on a dual-core RISC-V processor. The compact Ox64 is enabled with Wi-Fi 4.0, Zigbee BL5.0…
Andes Announces the N25F-SE Processor, the World First RISC-V CPU IP with ISO 26262 Full Compliance | Yahoo! FinanceSystematic failures and random hardware failures can be mitigated by development process and safety designs of the safety-enhanced N25F-SE HSINCHU, TAIWAN, Oct. 17, 2022 (GLOBE…
IAR Systems’ Functional Safety Certified Development Tools for RISC-V support latest SiFive Automotive Solutions | IAR SystemsIAR Embedded Workbench for RISC-V provides full core support for the recently introduced SiFive Automotive E6-A and S7-A products Uppsala, Sweden – October 17, 2022 –…
IAR boosts its automotive RISC-V support | Nick Flaherty, EE News EuropeIAR Systems has added support for the latest RISC-V automotive CPU IP from SiFive to its embedded tools. The IAR Embedded Workbench for RISC-V now…
Ox64 SBC powered by dual RISC-V processors | Giorgio Mendoza, Linux GizmosPine64 announced a few days ago their latest SBC based on a dual-core RISC-V processor. The compact Ox64 is enabled with Wi-Fi 4.0, Zigbee BL5.0…