Verification company Breker is well-versed in ensuring complex semiconductors stay robust in tough conditions, but space forced it to think differently.
Read More
Developed with SiFive, the dual-core SoC uses patented error correction to achieve a record 16.8 µW/MHz/DMIPS, targeting next-gen wearables, drones, and IoT sensors. In a move aimed at the growing…
Read More
Google Research has open-sourced its Coral NPU IP (previously codenamed Kelvin), which it is giving to the industry in a bid to accelerate edge AI implementations by reducing fragmentation and…
Read More
Annual RISC-V Summits, organized by RISC-V International, serve as vital hubs for innovation, writes SemiWiki's Daniel Nenni.
Read More
At RISC-V North American Summit in Santa Clara, Ashling and Embecosm today announced robust ExecuTorch implementations optimised for resource-constrained devices, including RISC-V based microcontrollers. The collaboration enables developers to deploy…
Read More
The eProcessor Project today announced the successful development and deployment of the Europe’s first out-of-order RISC-V processor silicon. The processor, manufactured in a 22nm process, represents a leap forward in…
Read More