World RISC-V Day: Beijing 2025

RISC-V International Staff

RISC-V International’s staff bring together expertise from multiple disciplines to advance our mission of promoting the RISC-V instruction set architecture (ISA). On the RISC-V blog, we highlight stories from and about our members that showcase collaboration, innovation, and growth across the RISC-V ecosystem.

Summary

World RISC-V Day Beijing brought the community together for a high-energy, high-impact celebration of open computing. With 200+ attendees onsite and 5,400+ participants joining online, the event showcased the growing global momentum behind RISC-V innovation.

Hosted at the Beijing Institute of Open Source Chip, the program featured keynotes and technical sessions highlighting advancements across the ecosystem—including Xiangshan’s open-source high-performance RISC-V processor, agile chip verification driven by FPGA, Unity Chip’s developer-driven verification model, and new developments in RISC-V security and talent training through the “One Student, One Chip” initiative.

Community updates from openEuler, openKylin, openCloudOS, Deepin, and leading companies such as SpacemiT, Lanxin Computing, and Zhihe Computing further demonstrated the strength and maturity of the RISC-V software and hardware landscape. The event concluded with a hands-on Xiangshan Nanhu Development Board & Nanhu Laptop demo and community networking.