RISC-V for HPC at SC24
RISC-V is an open Instruction Set Architecture (ISA), where the ISA can be thought of as the contract between the software and hardware worlds. Since RISC-V was... Read more.
Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
MOUNTAIN VIEW, Calif.–(BUSINESS WIRE)–Esperanto Technologies™, a leading developer of RISC-V chips and software for high-performance computing (HPC)... Read more.
Openchip, NEC and Barcelona Supercomputing Center studying Collaboration to develop Next Generation Supercomputers based on RISC-V
Barcelona / Tokyo, 14 of November 2024 –Openchip, NEC and the Barcelona Supercomputing Center are studying collaboration to develop the new Openchip Vector Computing... Read more.
Triton kernel performance on RISC-V CPU
Introduction to Triton Triton is an open-source, Python-based Domain-Specific Language (DSL) developed by OpenAI to simplify the writing of high-performance GPGPU... Read more.
DeepComputing Launches Early Access Program for DC-ROMA RISC-V Mainboard for Framework Laptop 13
DeepComputing is excited to announce the launch of an exclusive early access program for the DC-ROMA RISC-V Mainboard, specifically designed for industry and business... Read more.
VIDEO: RISC-V Design Innovations with Custom Extensions | Synopsys
Andes and Synopsys present a ‘software first’ design flow using virtual platforms/prototypes allows RISC-V developers to explore new hardware configuration options... Read more.
MIPS releases RISC-V CPU for autonomous vehicles
MIPS released its P8700 CPU based on the RISC-V computing architecture to target driver assistance and autonomous vehicle applications. The San Jose, California-based... Read more.
The Convergence of Functional with Safety, Security and PPA Verification
Formal For All! “Do I need a PhD to use formal verification?” “Can formal methods really scale?” “Is it too difficult to write formal properties that actually... Read more.
Stream Computing Provides Smart Community Services Based on RISC-V Computing Power and LLMs
By Deke Wang and David Chen, Stream Computing In the wave of digital transformation, the intelligent upgrade of community services has become key to improving the... Read more.
Stream Computing RISC-V Matrix Extension Open Source Project Upgrades to Version 0.5, Supporting Vector+Matrix Implementation
By Fujie Fan and David Chen, Stream Computing Background: In order to solve the problem of instruction fragmentation of RISC-V in AI field and accelerate the pace... Read more.