New Part Day: Espressif Esp32-C6 Includes Wifi 6 and a RISC-V Core | Kerry Scharfglass, Hackaday
If you’re a reader of Hackaday, then you’ve almost certainly encountered an Espressif part. The twin microcontroller families ESP8266 and ESP32 burst onto the... Read more.
Video: Pipelining of RISC-V processor
This is a short discussion of the concept of "pipelining" of RISC-V processor. It was created to supplement the lectures of a course focused on computer hardware.... Read more.
Video: Stall vs. Flush in RISC-V processor
This is a short discussion of the concept of "pipelining" of RISC-V processor. It was created to supplement the lectures of a course focused on computer hardware.... Read more.
Xen releases a new version 4.15 after a slightly delayed development process | Simon Sharwood, APAC Editor, The Register
The Xen project has released another upgrade to its open source hypervisor.
Development of this new cut – version 4.15 – proved a little trickier than expected,... Read more.
Open Source Leader Shares the Importance of Knowing and Embracing Your Strengths with Executive Kim McMahon | The Digital Executive
RISC-V International's Director of Visibility & Community Engagement, Kim McMahon, joins Coruzant Technologies for the Digital Executive podcast. She shares... Read more.
RISC-V Star Rises Among Chip Developers Worldwide | Jeremy Hsu, IEEE Spectrum
The upstart RISC-V chip architecture has found international traction with its customizable open-source design and lack of licensing fees
Read the full article.... Read more.
Efinix® Announces Expansion of High-Performance Titanium FPGA Product Line | Press Release
Titanium Product Line Expands to 1M Logic Elements
SANTA CLARA, Calif.--(BUSINESS WIRE)--Efinix®, an innovator in programmable product platforms and technology,... Read more.
Get Ready for the Most Interesting CPU Market We’ve Seen in Decades | Joel Hruska , Extreme Tech
For most of the last 2.5 decades, the PC CPU industry has been dominated by a single architecture: x86. While the 1990s opened with a number of architectures technically... Read more.
Week In Review: Design, Low Power | Jessee Allen, Semiconductor Engineering
Standards
CHIPS Alliance and RISC-V International will work jointly to update the OmniXtend Cache Coherency specification. The two groups formed a new OmniXtend... Read more.
DARPA adds RISC-V to its Toolbox: Defense researchers can get special access to SiFive chip designs | Katyanna Quach
Engineers and scientists working on American military research programs can now access RISC-V processor core designs and associated blueprints through DARPA's Toolbox,... Read more.