Alibaba Cloud Tops MLPerf Tiny v0.7 Benchmark | Alibaba Cloud
Alibaba Cloud’s Xuantie C906 processor attained firsts in the most recent findings from MLPerf Tiny v0.7, an AI benchmark focusing on IOT devices. The Xuantie... Read more.
Xuantie IOMMU from T-Head for RISC-V | Chong Ren, Alibaba Cloud
The recent development of the RISC-V IOMMU effort has attracted substantial attention from the RISC-V community. Xuantie IOMMU from T-Head Semiconductors of Alibaba... Read more.
Mi-V Ecosystem Partner Solutions | Leah Iris, Microchip
The Mi-V RISC-V ecosystem is a continuously expanding, comprehensive suite of tools and design resources developed by Microchip and numerous third parties to fully... Read more.
XuanTie VirtualZone: RISC-V-based Security Extensions | Xuan Jian, Alibaba Cloud
Introduction
Among many new things in the 21st century, internet and IoT have been one of the most significant human advancements. As fast-paced and accelerating... Read more.
HPCwire‘s People to Watch Program | HPCWire
2022 marks the 20th year of HPCwire‘s People to Watch Program, which recognizes HPC professionals who play leading roles in driving innovation within their particular... Read more.
MIPS Chooses Ashling’s RiscFree™ Toolchain for its RISC-V ISA Compatible IP Cores | Ashling and MIPS, BusinessWire
Ashling and MIPS announced today that Ashling’s RiscFree™ Toolchain has been extended to support MIPS RISC-V ISA based IP cores. RiscFree™ is Ashling’s... Read more.
RISC-V is coming to the internet of things | Stacey Higginbotham, Stacey on IoT
Fans of this newsletter know I’m a major chip nerd. I started my tech career as a semiconductor reporter, and for the last seven or eight years I’ve been closely... Read more.
SEGGER releases new Embedded Studio for RISC-V with hard real-time C++ support | SEGGER, Electronic Engineering Journal
SEGGER’s Embedded Studio for RISC-V, Version 6, now uses real-time memory management which improves efficiency and response time when allocating and freeing up... Read more.
RISC-V Gets Sv57-Based Virtual Memory, Other Improvements For Linux 5.18 | Michael Larabel, Phoronix
The RISC-V CPU architecture updates have landed for the in-development Linux 5.18 kernel.
Notable with the RISC-V additions for Linux 5.18 is sv57 support for... Read more.
Now the V in RISC-V Stands for VROOM! | Matthew Carlson, Hackaday
Hundreds of variations of open-source CPUs written in an HDL seem to float around the internet these days (and that’s a great thing). Many are RISC-V, an open-source... Read more.