Dongshan Nezha STU devkit features Allwinner D1 RISC-V SoM/SBC | Jean-Luc Aufranc, CNX Software
Dongshan Nezha STU is a development kit comprised of an Allwinner D1 RISC-V system-on-module (SoM) and a carrier board with three 40-pin headers to access I/Os from... Read more.
Adafruit’s QT Py ESP32-C3, Its First RISC-V Dev Board, Begins Rolling Off the Production Line | Gareth Halfacree, Hackster.io
Adafruit has confirmed that its QT Py ESP32-C3, the company's first development board built around the free and open source RISC-V instruction set architecture,... Read more.
CEO Interview: Frankwell Lin, Chairman and CEO of Andes Technology | Daniel Nenni, SemiWiki
Frankwell Lin, Chairman of Andes Technology, started his career being as application engineer in United Microelectronics Corporation (UMC) while UMC was an IDM... Read more.
RISC-V AI Chips Are Joining GPU Race for AI Processing | Paul Mah, CDO Trends
A free and open-source instruction set architecture (ISA) is quietly gaining momentum and could well power a significant number of the estimated 25 billion AI chips... Read more.
Alphawave IP Announces Definitive Agreement to Acquire Entire OpenFive Business Unit from SiFive for US$210m in cash | Design and Reuse
Transaction will accelerate Alphawave’s connectivity leadership, product offerings and customer base while driving higher scale and revenue growth from an expanded... Read more.
IAR extends powerful RISC-V solutions with 64-bit support | IAR Systems
IAR Systems extends powerful RISC-V solutions with 64-bit support.
Bringing high-performance, well-established technology to companies choosing the emerging RISC-V... Read more.
Intel Foundry Services Going Big On RISC-V ‘Brawny Cores’ With Ventana Micro Systems Compute Tiles | Patrick Moorhead, Forbes
Intel has made a considerable amount of strategic announcements in the past month, whether it be its Tower Semi acquisition, its $20B Ohio investment or numerous... Read more.
Exploring emerging trends and topics in RISC-V architecture | Mouser Electronics, ElectroPages
Mouser has launched the 2022 series of its Empowering Innovation Together program. This year's series comprises six instalments that spotlight a leading-edge technology... Read more.
Imperas unifies new RISC-V verification ecosystem with RVVI | Imperas
New open standard RISC-V Verification Interface (RVVI) offers adaptability and verification IP reuse for the expanding community of developers undertaking processor... Read more.
Mouser Electronics Launches 2022 Empowering Innovation Together Program with New Podcast on RISC-V | Raymond Yin, Business Wire
The first installment of Mouser's 2022 Empowering Innovation Together program zeroes in on RISC-V, including a new episode of The Tech Between Us podcast.
Mouser... Read more.