newelectronics: Quintauris and Vector to integrate MICROSAR Classic on automotive RISC-V platform
newelectronics: Quintauris and Vector have partnered to integrate MICROSAR Classic into the RT-EUROPA real-time RISC-V automotive platform, giving developers a faster,... Read more.
Ocelot3: Full Vector “V” Extension for BOOM
Project Snapshot
Ocelot is an open-source project that enables vector support for the BOOM core. In this generation, we achieve full RVV 1.0 support. The decoupled... Read more.
ChannelLife: Edge AI, security & RISC-V to redefine IoT chips by 2026
Channel Life: The IoT semiconductor market is heading into a major shift by 2026, driven by the mainstream adoption of edge AI, the rise of open and modular architectures... Read more.
Electronic Design: Checking Out the RISC-V Summit North America 2025
Electronic Design: Although the RISC-V Summit North America 2025 has concluded, viewers can still explore many of the keynotes and sessions now available online.... Read more.
Semiconductor Engineering: Why Openness Matters For AI At The Edge
Semiconductor Engineering:
AI continues to migrate towards the edge and is no longer confined to the data center. Edge AI brings several key advantages, delivering... Read more.
Enabling High Performance RISC-V Software for AI in the Real World
Embecosm used the oneAPI Construction Kit to explore accelerating PyTorch using RISC-V cores, trying over a thousand in emulation and some on an FPGA. This case... Read more.
Andes: d-Matrix and Andes Team on World’s Highest Performing, Most Efficient Accelerator for AI Inference at Scale
Andes: d-Matrix and Andes have partnered to integrate Andes’ high-performance AX46MPV RISC-V CPU IP into d-Matrix’s next-generation Raptor accelerator, the first... Read more.
EDN: RISC-V Summit spurs new round of automotive support
EDN: RISC-V adoption in automotive applications is accelerating, with new partnerships and certified processor cores enabling software-defined vehicles and safety-critical... Read more.
WebProNews: RISC-V’s ISO Milestone: Open ISA Poised for Global Dominance
WebProNews: RISC-V International has achieved Publicly Available Specification (PAS) Submitter status from ISO/IEC JTC1, marking a major step toward international... Read more.
EEWorldOnline: MIPS releases multithreaded processor for edge computing
EEWorldOnline: MIPS has begun sampling its new I8500 processor, a scalable, multithreaded data movement processor IP designed for real-time, event-driven computing... Read more.