The newly released RISCstar toolchain is a pre-compiled family of GNU toolchains for RISC-V developers. It supports the entire RISC-V ecosystem, from the latest 64-bit application processors, right down to…
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At RISC-V Summit North America 2025, Andrea Gallo, CEO RISC-V International, and Phil Wennblom, Chair of the ISO/IEC Joint Technical Committee (JTC 1)., announced that RISC-V International has been approved…
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At RISC-V North American Summit in Santa Clara, Ashling and Embecosm today announced robust ExecuTorch implementations optimised for resource-constrained devices, including RISC-V based microcontrollers. The collaboration enables developers to deploy…
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The knowledge gap for porting software to RISC-V is about to close. RISCstar Solutions, in close collaboration with RISC-V International and the Linux Foundation, has developed a comprehensive online training…
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The eProcessor Project today announced the successful development and deployment of the Europe’s first out-of-order RISC-V processor silicon. The processor, manufactured in a 22nm process, represents a leap forward in…
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Risky Systems’ Bob Jones explains why the company’s latest core is set to revolutionize the AI SoC market, and how it intends to use it to take the US by…
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RISC-V Summit North America 2025 will bring the global RISC-V community together in Santa Clara for two days of keynotes, technical sessions, workshops, and demos.
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A Note From Our CEO Welcome to the latest RISC-V newsletter, my first as the new CEO at RISC-V International. I’m incredibly excited to step into this new role at…
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In this episode of Embedded Insiders, we’re joined by RISC-V’s newest CEO, Andrea Gallo, who outlines his vision for the company’s future. From accelerating ecosystem growth to his expectations for current…
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As RISC-V turns 15, we explore how a summer grad project became the official compute architecture of nations – and why its story is just beginning.
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