No recent posts listed
Hardware Trojan Inserted Inside A RISC-V Based Automotive Telematics Control Unit | Moschos, Athanasios, Kevin Valakuzhy, and Angelos D. Keromytis, Semiconductor Engineering
InspireSemi to Ring the Toronto Stock Exchange Closing Bell on October 25 | InspireSemi
Ventana Micro Brings RISC-V Into The Data Center | Karl Freund, Forbes
First Patches from Alibaba Cloud Enable Android Open Source Project on RISC-V | Han Mao and David Chen, Alibaba Cloud
RISC-V Celebrates Upstreaming of Android Open Source Project RISC-V Port | RISC-V International
10 cents CH32V003 RISC-V MCU offers 2KB SRAM, 16KB flash in SOP8 to QFN20 packages | Jean-Luc Aufranc, CNX Software
Rise of RISC-V: The computer chip design you need to know about | Stephen Vicinanza, Interesting Engineering
Google Announces New Open-source OS for RISC-V Chips | Darshil Patel, All About Circuits
Ubuntu 22.10 Released With Improved Steam App, GNOME 43, RISC-V Support | Ian Evenden, Tom’s HardwareEspressif ESP8684 RISC-V WiFi & BLE MCU embeds up to 4MB flash in a 4x4mm package | Jean-Luc Aufranc, CNX Software
Google comes up with new OS for RISC-V | Nick Farrell, Fudzilla
‘First’ RISC-V CPU certified compliant with ISO 26262 | Steve Bush, Electronics Weekly
Linux 5.18 To Bring RISC-V sv57 Support For 5-Level Page Tables | Michael Larabel, Phoronix
Esperanto Technologies Partners with Intel to Advance Massively Parallel RISC-V-based AI Acceleration Solutions | Esperanto Technologies
SiFive Partners with Intel to Spark Innovation in High-Performance RISC-V Platforms | SiFive
Andes Technology Corp. and Intel Foundry Services Bring RISC-V Solutions to Build an Open Ecosystem | Andes Technology Corporation
Ventana Micro Systems Inc. Announces Strategic Partnership With Intel For Broader Commercialization Of Its High-Performance RISC-V Cores And Chiplets | Ventana Micro SystemsIntel Creates $1B Innovation Fund To Grow RISC-V Market (And Attract New Foundry Customers) | Karl Freund, Forbes
Intel Corporation Makes Deep Investment in RISC-V Community to Accelerate Innovation in Open ComputingLooking Back On 2021: Strong Growth Momentum Of RISC-V Market | Andes Technology
An Efficient Lightweight Cryptographic Instructions Set Extension for IoT Device Security | Wajih El Hadj Youssef, Ali Abdelli, Fethi Dridi, Rim Brahim, and Mohsen Machhout, Faculty of Sciences of Monastir, Electronics and Micro-Electronic Laboratory (LEME)India goes RISC-V with VEGA processors | Jean-Luc Aufranc, CNX Software
Enhancing supply chain security for embedded systems: Renode Dashboard for Zephyr RTOS adds new SBOM capabilities by default | Michael Gielda (Antmicro) and Kate Stewart (Linux Foundation), Linux.comRust Cross-Compilation | Daniel Mangum, RISC-V BYTES
Hardware Trojan Inserted Inside A RISC-V Based Automotive Telematics Control Unit | Moschos, Athanasios, Kevin Valakuzhy, and Angelos D. Keromytis, Semiconductor EngineeringA new technical paper titled “On the Feasibility of Remotely Triggered Automotive Hardware Trojans” was written by researchers at Georgia Tech. “In this paper, we…
InspireSemi to Ring the Toronto Stock Exchange Closing Bell on October 25 | InspireSemiVANCOUVER, British Columbia and AUSTIN, Texas, Oct. 24, 2022 (GLOBE NEWSWIRE) -- Inspire Semiconductor Holdings Inc. (TSXV: INSP) (“InspireSemi™” or the “Company”), a chip design company with…
Ventana Micro Brings RISC-V Into The Data Center | Karl Freund, ForbesCompany hopes to match or even exceed x86 and Arm performance for data center infrastructure and applications. The data center is becoming more heterogeneous in…
First Patches from Alibaba Cloud Enable Android Open Source Project on RISC-V | Han Mao and David Chen, Alibaba CloudThe Android Open Source Project (AOSP), an initiative by Google to guide development of the Android platform, has approved and merged patches from Alibaba Cloud.…
RISC-V Celebrates Upstreaming of Android Open Source Project RISC-V Port | RISC-V InternationalSuccess in the mobile and consumer device market depends on a vibrant software ecosystem. Over the past decade the Android Open Source Project (AOSP) has…
10 cents CH32V003 RISC-V MCU offers 2KB SRAM, 16KB flash in SOP8 to QFN20 packages | Jean-Luc Aufranc, CNX SoftwareWCH CH32V003 is a new ultra-cheap RISC-V microcontroller (MCU) clocked at 48 MHz with 2KB SRAM, 16KB flash, and a bunch of interfaces that sells…
Rise of RISC-V: The computer chip design you need to know about | Stephen Vicinanza, Interesting EngineeringIE speaks to RISC-V team that has already shipped more than 10 Billion cores across the globe. The RISC-V is relatively a new chip in town (pronounced…
Google Announces New Open-source OS for RISC-V Chips | Darshil Patel, All About CircuitsUsing a new Rust-based operating system, Google aims to secure ambient machine learning on embedded hardware. Researchers at Google recently announced a mathematically-secure platform, KataOS, optimized for…
Ubuntu 22.10 Released With Improved Steam App, GNOME 43, RISC-V Support | Ian Evenden, Tom’s HardwareKinetic Kudu is finally here. The latest release of popular Linux distribution Ubuntu 22.10 has been announced for general release. This time there's quite a lot that’s…
Espressif ESP8684 RISC-V WiFi & BLE MCU embeds up to 4MB flash in a 4x4mm package | Jean-Luc Aufranc, CNX SoftwareEspressif Systems ESP8684 is a single-core RISC-V microcontroller with 2.4 GHz WiFi 4 and Bluetooth 5.0 LE (BLE) connectivity that also integrates 1, 2, or…
Google comes up with new OS for RISC-V | Nick Farrell, FudzillaKataOS is more secure Search engine outfit Google has shown off its KataOS, a new secure operating system for embedded open-source RISC-V chips. Google's KataOS…
‘First’ RISC-V CPU certified compliant with ISO 26262 | Steve Bush, Electronics WeeklyAndes Technology has introduced safety-enhanced RISC-V CPU intellectual property, claiming it to be “the first to certified to be fully compliant with ISO 26262 functional…
No recent posts listed
No recent posts listed
No recent posts listed
No recent posts listed
Linux 5.18 To Bring RISC-V sv57 Support For 5-Level Page Tables | Michael Larabel, PhoronixIt was just with Linux 5.17 that its RISC-V code adds "sv48" support for being able to handle more system memory by offering 48-bit virtual address space…
Esperanto Technologies Partners with Intel to Advance Massively Parallel RISC-V-based AI Acceleration Solutions | Esperanto TechnologiesEsperanto Technologies™, the leading developer of high-performance, energy-efficient artificial intelligence (AI) inference accelerators based on the RISC-V instruction set, today announced that the company is…
SiFive Partners with Intel to Spark Innovation in High-Performance RISC-V Platforms | SiFiveSiFive, Inc., the founder and leader of RISC-V computing, today announced the company will support Intel Foundry Services (IFS) innovation fund’s goal to build innovative…
Andes Technology Corp. and Intel Foundry Services Bring RISC-V Solutions to Build an Open Ecosystem | Andes Technology CorporationAndes Joins IFS IP Alliance Program to Offer Industry Leading, Optimized Open RISC-V IP with Integrated Software Solution. Andes Technology Corporation (TWSE: 6533; SIN: US03420C2089;…
Ventana Micro Systems Inc. Announces Strategic Partnership With Intel For Broader Commercialization Of Its High-Performance RISC-V Cores And Chiplets | Ventana Micro SystemsVentana Micro Systems Inc., a leader in high-performance RISC-V processors, announces a strategic partnership to make its RISC-V CPU cores and chiplets available through Intel…
Intel Creates $1B Innovation Fund To Grow RISC-V Market (And Attract New Foundry Customers) | Karl Freund, ForbesThis announcement will have a long-lasting impact on the entire semiconductor industry. Intel must fabricate chips for its competitors to grow its foundry business, and…
RISC-V welcomes Intel to the Board of Directors to collaborate on RISC-V IP and contribute engineering expertise to accelerate RISC-V software development ZURICH – February…
Looking Back On 2021: Strong Growth Momentum Of RISC-V Market | Andes TechnologyAs more and more international technology companies are embracing RISC-V and expanding their market and applications, Andes is determined to continue to drive the RISC-V…
An Efficient Lightweight Cryptographic Instructions Set Extension for IoT Device Security | Wajih El Hadj Youssef, Ali Abdelli, Fethi Dridi, Rim Brahim, and Mohsen Machhout, Faculty of Sciences of Monastir, Electronics and Micro-Electronic Laboratory (LEME)Abstract The Internet of Things is changing all sectors such as manufacturing, agriculture, city infrastructure, and the automotive industry. All these applications ask for secure…
India goes RISC-V with VEGA processors | Jean-Luc Aufranc, CNX SoftwareOne of the main advantages of RISC-V architecture is that it is open, so any organization with the right skills can develop its own cores,…
Enhancing supply chain security for embedded systems: Renode Dashboard for Zephyr RTOS adds new SBOM capabilities by default | Michael Gielda (Antmicro) and Kate Stewart (Linux Foundation), Linux.comA Software Bill of Materials (or SBOM) makes the information about the software components running on a system available. Transparency and summarization are needed in…
Rust Cross-Compilation | Daniel Mangum, RISC-V BYTESThis is part of a series on the blog where we explore RISC-V by breaking down real programs and explaining how they work. You can view all…