As a Strategic member of RISC-V International, Tiempo Secure will secure and integrate processors implementing the RISC-V open standard instruction set architecture (ISA) into its TESIC Secure Element…
Intel demos “Horse Creek” developer board with SiFive RISC-V CPU, DDR5 RAM and PCIe 5.0 slot | Bogdan Solca, Notebook CheckThe Horse Creek board features a SoC with 4x SiFive P550 cores manufactured on the Intel 4 production nodes. Intel integrated 8 GB of DDR5-5600…
RiVAI Technologies Announced New Products in Their RISC-V Vector DSP IP Family: RiVAI V7 And RiVAI V9+ | RiVAI TechnologiesRiVAI Technologies has recently launched two new high-performance RISC-V vector IP series products: RiVAI V7 and RiVAI V9+, both with a customized RVV extension optimizing…
Andes Technology Announces Return of the Annual RISC-V CON on October 18th in the San Jose Airport DoubleTree Hotel | Andes TechnologySan Jose, Oct. 10, 2022 (GLOBE NEWSWIRE) -- Andes Technology Corporation (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099), a leading supplier of high efficiency, low-power 32/64-bit…
Alibaba RISC-V SoC Revealed as Processor for First RISC-V Laptop | Jake Hertz, All About CircuitsAlibaba's RISC-V SoC will power the ROMA development laptop, the industry’s first RISC-V offering. Of all the developments in the computing industry, the RISC-V movement…
Intel Horse Creek platform showcased with SiFive P550 RISC-V CPU, 8GB DDR5, PCIe Gen5 | Jean-Luc Aufranc, CNX SoftwareWhen SiFive introduced its Performance P550 64-bit RISC-V processor in 2021, we were told that Intel would use it in the Horse Creek platform with “leading-edge interface…
Pine64’s RISC-V Ox64 Takes On Raspberry Pi Pico W | Ian Evenden, Tom’s HardwareThe Raspberry Pi Pico W has a new competitor in the form of Pine64’s upcoming Ox64, spotted by CNX Software(opens in new tab), which uses the increasingly popular RISC-V…
PINE64 Unveils the Ox64, a Low-Cost Dual-Core RISC-V Single-Board Computer with Breadboard Support | Gareth Halfacree. Hackster.ioWith 64MB of RAM and up to 16MB of flash, this low-cost embedded machine features an unusual chip design. Open hardware specialist PINE64 has announced…
Pine64 Ox64 SBC to feature BL808 64-bit/32-bit RISC-V multi-protocol WiSoC with 64MB built-in RAM | Jean-Luc Aufranc, CNX SoftwarePine64 Ox64 is an upcoming single board computer powered by Bouffalo Lab BL808 dual-core 64-bit/32-bit RISC-V processor with up to 64MB embedded RAM, multiple radios…
Make the Most of Rad-Hard RTG4 FPGAs with the Right Approach to Timing and Resets | Microchip TechnologyDevelopers need to consider timing penalties when using rad-hard parts like our RTG4™ FPGAs. Choosing the right way to apply resets can help you optimize…
Intel’s Horse Creek dev board features SiFive P550 RISC-V processor and 8GB RAM | Brad Linder, LiliputingThe Intel “Horse Creek” developer board is compact computer board featuring 8GB of DDR5 memory, a PCIe 5.0 slot and SD card reader for storage,…
It’s Time to Consider RISC-V | Rob Enderle, SD TimesOver the last months, ARM has pulled licenses from the ARM server-focused company, Nuvia, because of Qualcomm’s acquisition of that company. Then, recently, it sued…
Andes RISC-V SoC shipments top 3 billion units in 2021 | Julian Ho, DigiTimesShipments for SoC chips adopting Andes Technology's processor IPs topped three billion units in 2021, representing a 2017-2021 CAGR of 50%, according to Frankwell Lin,…
Imagination GPU cleared for RISC-V CPU compatibility, licensed to chip designers | Agam Shah, The RegisterIt seems we're a step closer to system-on-chips containing a mix of RISC-V CPU cores and a mainstream GPU powering Linux devices and the like.…
RISC-V security IP for chiplet die-to-die communication | Nick Flaherty, EE News EuropeCeva’s Fortrix RISC-V-based SecureD2D IP enables secure authentication and firmware boot/code load between chiplets in a heterogeneous system-on-chip. Ceva has launched security IP that protects…
RISC-V is an open-source standard instruction set architecture (ISA) that is managed by the non-profit RISC-V Foundation. This modular ISA has a base instruction set and…
On October 19, 2021, at the 2021 Apsara Conference, Zhang Jianfeng, President of Alibaba Cloud Intelligence, announced that T-Head has made the XuanTie RISC-V series…
Introduction to FPGA Part 11 – RISC-V Softcore Processor | Digi-Key ElectronicsA field-programmable gate array (FPGA) is an integrated circuit (IC) that lets you implement custom digital circuits. You can use an FPGA to create optimized…
Introducing an Open Source Microkernel OS for AIoT | Blues Lin, RT-ThreadRT-Thread engineer has given a presentation to introduce RT-Thread Smart, an open-source MicroKernel OS. RT-Thread Smart is positioned as a professional, high-performance, micro-kernel operating system…
Take Control of Your RISC-V Codebase | Rafael Taubinger, Electronic DesignWhen we talk about take control of your RISC-V codebase, there are really two aspects to it. The first meaning is reusing your codebase for…
Redpine Founder Launches AI Processor Startup | Sally Ward-Foxton, EE TimesCeremorphic, an AI chip startup emerging from stealth mode this week, is readying a heterogeneous AI processor aimed at model training in data centers, automotive,…
Ceremorphic addresses AI, HPC, and the metaverse with QS 1 chip, lands $50M | Arne Verheyde, Venture BeatToday, Ceremorphic, a startup, is coming out of stealth mode with $50 million of series A funding along with the announcement of the QS 1 chip,…
RISC-V CH32V307 QuickStart E01 | WCHMake RISC-V MCU development more convenient. Watch the full video.
$10 RISC-V Development Board is an Arduino Alternative | Ian Evenden, Tom’s HardwareA new RISC-V board out of China boasts eight UART interfaces and is looking for community involvement with its firmware. RISC-V boards come in many…