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Framework Based On An RISC-V Microprocessor Supporting LiM Operations | Coluccio, A.; Ieva, A.; Riente, F.; Roch, M.R.; Ottavi, M.; Vacca, M. RISC-Vlim, Semiconductor Engineering
Acceleration Robotics Partners with PlanV for a Robotics-Specific Open Source RISC-V Microcontroller | Gareth Halfacree, Hackster.io
Google experiments with RISC-V | Nick Farrell, Fudzilla
The Automotive Space Gears Up to Take on RISC-V | Murray Slovick, Electronic Design
Customising PolarFire® SoC FPGA for International Space Station Mission | Microchip Technology
ST to make European octacore RISC-V space chip with selectable cores | Nick Flaherty, EE News Europe
Arm vs RISC-V? Which One Is The Most Efficient? | Gary ExplainsNative RISC-V ROS chip targets robotics | Nick Flaherty, EE News Europe
SiFive RISC-V cores picked for Google AI compute nodes | Dan Robinson, The Register
Google deploys SiFive’s Intelligence X280 processor for AI workloads | Sebastian Moss, Data Center DynamicsCodasip joins OpenHW to push RISC-V verification | Nick Flaherty, EE News Europe
ARM IS THE NEW RISC/UNIX, RISC-V IS THE NEW ARM | Timothy Prickett Morgan, The Next Platform
Baikal Electronics allies with IP-cores domestic developer | Design & Reuse
Tang Nano 9K FPGA board can emulate PicoRV32 RISC-V soft-core with all peripherals | Jean-Luc Aufranc, CNX Software
RISC-V MCU CH32V307 Tutorial — Voice Control DEMO | Verimake
CFU Playground: Customize Your ML Processor for Your Specific TinyML Model | Tim Callahan, TinyML Talks
The Rapid Rise of RISC-V | Jack Kang, SiFive
ZAYA Secure μContainers for RISC-V Microcontrollers | Zaya
RISC-V SoCs: Powering Embedded Computing | Efinix, Inc.
“Revolutionizing Computer Architecture” – A fireside chat Dr. David Patterson, Vice Chair of RISC-V | Shaastra IITMIs Programmable Overhead Worth The Cost? | Brian Bailey, Semiconductor Engineering
Alibaba Cloud opens up IoT technology development platform | Shannon Williams, ChannelLife AustraliaA Minimal RISC-V | Brian Bailey, Semiconductor Engineering
Embedded Computing Design’s 2022 Tech Industry Predictions | Rich Nass, Embedded Computing Design
Framework Based On An RISC-V Microprocessor Supporting LiM Operations | Coluccio, A.; Ieva, A.; Riente, F.; Roch, M.R.; Ottavi, M.; Vacca, M. RISC-Vlim, Semiconductor EngineeringA new technical paper titled “RISC-Vlim, a RISC-V Framework for Logic-in-Memory Architectures” was published by researchers at Politecnico di Torino (Italy), Univerity of Tor Vergata…
Acceleration Robotics Partners with PlanV for a Robotics-Specific Open Source RISC-V Microcontroller | Gareth Halfacree, Hackster.ioDesigned specifically for ROS 2, the roscore-v RISC-V microcontroller promises reduced latencies and new real-time capabilities. Performance-boosting specialist Acceleration Robotics has announced a partnership with…
Google experiments with RISC-V | Nick Farrell, FudzillaSiFive RISC-V chips are being used by Google to run some of its AI workloads and tested in Google datacentres. SiFive's Intelligence X280 is a multi-core…
The Automotive Space Gears Up to Take on RISC-V | Murray Slovick, Electronic DesignSiFive is creating a lineup of compute IP for MCUs, MPUs, and soon, SoCs, as well as vector-processing solutions tailored for automotive applications. The first…
Customising PolarFire® SoC FPGA for International Space Station Mission | Microchip TechnologyOur Mi-V Ecosystem partner Emdalo Technologies Ltd. (Emdalo) has successfully customised PolarFire® SoC FPGA Linux® and associated boot flow for Skycorp Inc.’s recent space-mission on…
ST to make European octacore RISC-V space chip with selectable cores | Nick Flaherty, EE News EuropeSpace system designer CAES has built the first eight core fault tolerant chip that is selectable between different architectures, including RISC-V. The radiation hardened GR765 System-on-Chip (SoC)…
Arm vs RISC-V? Which One Is The Most Efficient? | Gary ExplainsArm has been making power efficient processors for decades. RISC-V is relativity new and many parts of its specifications aren't even ratified, but that hasn't…
Native RISC-V ROS chip targets robotics | Nick Flaherty, EE News EuropeTwo European companies are developing a microcontroller chip using the open source RISC-V instruction set that is optimised to run the latest Robot Operating System…
SiFive RISC-V cores picked for Google AI compute nodes | Dan Robinson, The RegisterCor, that's a shot in the arm for this upstart CPU ISA RISC-V chip biz SiFive says its processors are being used to manage AI…
Google deploys SiFive’s Intelligence X280 processor for AI workloads | Sebastian Moss, Data Center DynamicsGoogle is using the RISC-V-based SiFive Intelligence X280 processor in combination with the Google TPU, as part of its portfolio of AI chips. Fabless chip…
Codasip joins OpenHW to push RISC-V verification | Nick Flaherty, EE News EuropeGerman RISC-V core designer Codasip has joined the OpenHW group to push for advances in the verification of RISC-V cores. Codasip has highlighted issues with…
ARM IS THE NEW RISC/UNIX, RISC-V IS THE NEW ARM | Timothy Prickett Morgan, The Next PlatformWhen computer architectures change in the datacenter, the attack always comes from the bottom. And after more than a decade of sustained struggle, Arm Ltd…
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Baikal Electronics allies with IP-cores domestic developer | Design & Reuse“Varton Group” (“Baikal Electronics” & “Astra Linux Group” shareholder) acquires a stake in Russian developer of RISC-V based IP processor cores - CloudBEAR Company. Supporting…
Tang Nano 9K FPGA board can emulate PicoRV32 RISC-V soft-core with all peripherals | Jean-Luc Aufranc, CNX SoftwareTang Nano 9K FPGA is the third board from Sipeed based on GOWIN FPGA following the original Tang Nano board with 1K LUT and Tang Nano 4K launched last…
RISC-V MCU CH32V307 Tutorial — Voice Control DEMO | VerimakeRISC-V MCU CH32V307 Tutorial — Voice Control DEMO Configuration of the Development Environment DEMO Programme Procedure Description See the full tutorial.
CFU Playground: Customize Your ML Processor for Your Specific TinyML Model | Tim Callahan, TinyML TalksCFU (Custom Function Unit) Playground lets you build your own specialized & optimized ML processor based on the RISC-V ISA, implemented on an FPGA using…
The Rapid Rise of RISC-V | Jack Kang, SiFiveSiFive is aiming high with bold new technology for performance-driven applications. SiFive transformed in 2021 and grew from leading RISC-V for embedded products into performance-demanding…
ZAYA Secure μContainers for RISC-V Microcontrollers | ZayaMarking a key milestone in IoT security, Zaya has announced Secure Containers for RISC-V Microcontrollers. Containers are useful tools provided by Rich Operating Systems such…
RISC-V SoCs: Powering Embedded Computing | Efinix, Inc.RISC-V is an open-source standard instruction set architecture (ISA) that is managed by the non-profit RISC-V Foundation. This modular ISA has a base instruction set and…
“Revolutionizing Computer Architecture” – A fireside chat Dr. David Patterson, Vice Chair of RISC-V | Shaastra IITMThe advent of the 20th century saw an evolution like no other. At the heart of this evolution lies the ability of an instrument to…
Is Programmable Overhead Worth The Cost? | Brian Bailey, Semiconductor EngineeringProgrammability has fueled the growth of most semiconductor products, but how much does it actually cost? And is that cost worth it? The answer is…
Alibaba Cloud opens up IoT technology development platform | Shannon Williams, ChannelLife AustraliaAlibaba Cloud, the digital technology and intelligence arm of Alibaba Group, has announced it has opened the source code of Yun on Chip (YoC), its…
A Minimal RISC-V | Brian Bailey, Semiconductor EngineeringIs there room for an even smaller version of a RISC-V processor that could replace 8-bit microcontrollers? Microcontrollers exist in almost everything, but can RISC-V…
Embedded Computing Design’s 2022 Tech Industry Predictions | Rich Nass, Embedded Computing DesignSince we’ve turned the page on a new year, it’s time to make some predictions. I asked Brandon Lewis, the Embedded Computing Design Editor-in-Chief, to join me…