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Renesas unveils motor control RISC-V ASSP | Gina Roos, Electronic Products
Renesas delivers RISC-V based motor control ASSP | Nitin Dahad, Embedded.com
SoC.one and Imagination to enable adoption of RISC-V for automotive design | Neil Tyler, New Electronics
SiFive Rolls Out Powerful New RISC-V Portfolio to Address Unmet Performance and Feature Needs of Rapidly Evolving Next-Gen Digital Automobiles | SiFive
Cortus Announces the Launch of its New Secure Low Power RISC-V Microcontrollers | Cortus S.A.S
The Open Source Ztachip Is a RISC-V Accelerator for Edge AI and Computer Vision Applications | Gareth Halfacree, Hackster.io
RISC-V Does Motor Control | William G. Wong, Electronic Design Magazine
NASA Taps SiFive’s RISC-V Core for its Spaceflight Processor | Jake Hertz, All About CircuitsIntel Shows Support for RISC-V Chip Design With Intel Pathfinder | Jake Hertz, All About Circuits
Dolpin Design teams for RISC-V Headphone 3.0 chips | Nick Flaherty, EE News EuropeRISC-V to Launch into Space | James Morra, Electronic Design Magazine
NASA’s new space computer to be powered by custom RISC-V processor | Joel Khalili, Tech Radar
Picoclick C3T – the smallest ESP32-C3 based IOT button – assembly & tests | maker.moekoe
Rust on Apache Nuttx OS | Lup Yuen Lee, Mr. Tech BlogMangoPi Shows Off a Raspberry Pi Zero-Inspired MQ Pro RISC-V Single-Board Computer — and Router | Gareth Halfacree, Hackster.ioSub-mW Keyword Spotting on an MCU: Analog Binary Feature Extraction and Binary Neural Networks | Gianmarco Cerutti, Lukas Cavigelli, Renzo Andri, Michele Magno, Elisabetta Farella, Luca BeniniRISC-V不是你想得那樣 | RISC-V商業模式分析
2021 Year in Review | Roberto Frazzoli, EDA CafeMy RISC-V development environment for programming and reverse engineering purposes | Rog3rSm1th
Successful Conclusion of European Processor Initiative Phase One | European Processor Initiative
The Research of RISC-V for Embedded MCUs | RT-Thread
Linux 5.17 Adds Support For “The First Usable, Low-Cost RISC-V Platform” | Michael Larabel, PhoronixHEROv2: Full-Stack Open-Source Research Platform for Heterogeneous Computing | Andreas Kurth, Björn Forsberg and Luca Benini
Renesas unveils motor control RISC-V ASSP | Gina Roos, Electronic ProductsRenesas claims the industry’s first RISC-V MCU for advanced motor control, delivering a pre-programmed ASSP for a variety of applications. Renesas Electronics Corp. has claimed…
Renesas delivers RISC-V based motor control ASSP | Nitin Dahad, Embedded.comPre-programmed motor control ASSP eliminates RISC-V related tools and software investment, making it easier to target applications such as home and building automation, healthcare devices,…
SoC.one and Imagination to enable adoption of RISC-V for automotive design | Neil Tyler, New ElectronicsSoC.one Inc and Imagination Technologies have formed a strategic alliance to accelerate the adoption of RISC-V in the automotive design cycle. With the electrification of…
SiFive Rolls Out Powerful New RISC-V Portfolio to Address Unmet Performance and Feature Needs of Rapidly Evolving Next-Gen Digital Automobiles | SiFiveSiFive, Inc. the founder and leader of RISC-V computing, today announced three products as part of the first phase of a long-term roadmap and portfolio designed…
Cortus Announces the Launch of its New Secure Low Power RISC-V Microcontrollers | Cortus S.A.SCortus, an innovative French fabless semiconductor company today announces the availability of its secure low power RISC-V microcontrollers (MCUs) that address consumer products and automotive…
The Open Source Ztachip Is a RISC-V Accelerator for Edge AI and Computer Vision Applications | Gareth Halfacree, Hackster.ioDesigned to outperform even RISC-V chips with the recently-ratified vector extensions, ztachip can boost performance by up to 50x. Embedded developer Vuong Nguyen has released…
RISC-V Does Motor Control | William G. Wong, Electronic Design MagazineRISC-V is a topic that garners lots of interest, but RISC-V itself is nothing more than a scalable, open-source instruction set definition. It’s the implementation…
NASA Taps SiFive’s RISC-V Core for its Spaceflight Processor | Jake Hertz, All About CircuitsResponsible for inventions from wireless headphones to portable computers, space exploration has long been a field responsible for driving significant technological innovation. Today, NASA is fervently…
Intel Shows Support for RISC-V Chip Design With Intel Pathfinder | Jake Hertz, All About CircuitsIn yet another win for RISC-V, Intel has released a program to bolster the pre-silicon development of RISC-V devices. Emerging as a small project out of…
Dolpin Design teams for RISC-V Headphone 3.0 chips | Nick Flaherty, EE News EuropeFrench IP developer Dolphin Design has teamed up with Sonical in the US on the design of a platform for the next generation of chips…
RISC-V to Launch into Space | James Morra, Electronic Design MagazineSiFive, a startup developing IP based on the RISC-V architecture, said NASA has selected it to supply the core CPU for the agency's next high-performance…
NASA’s new space computer to be powered by custom RISC-V processor | Joel Khalili, Tech RadarNASA pens deal with SiFive, Microchip. NASA’s new High-Performance Spaceflight Computer (HPSC) will be powered by a custom RISC-V-based processor, it has been revealed. The product…
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Picoclick C3T – the smallest ESP32-C3 based IOT button – assembly & tests | maker.moekoeThe Picoclick C3T is a tiny WiFi and BLE IoT button for several applications. Originally designed for smart home things, the Picoclick can also be…
Rust on Apache Nuttx OS | Lup Yuen Lee, Mr. Tech BlogApache NuttX is an embedded operating system that’s portable across many platforms (8-bit to 64-bit) and works like a tiny version of Linux (because it’s POSIX Compliant). Can we create…
MangoPi Shows Off a Raspberry Pi Zero-Inspired MQ Pro RISC-V Single-Board Computer — and Router | Gareth Halfacree, Hackster.ioSingle-board computer startup MangoPi has unveiled a new design, inspired by the Raspberry Pi Zero range but swapping out its system-on-chip for a RISC-V-based part:…
Sub-mW Keyword Spotting on an MCU: Analog Binary Feature Extraction and Binary Neural Networks | Gianmarco Cerutti, Lukas Cavigelli, Renzo Andri, Michele Magno, Elisabetta Farella, Luca BeniniAbstract—Keyword spotting (KWS) is a crucial function enabling the interaction with the many ubiquitous smart devices in our surroundings, either activating them through wake-word or…
RISC-V不是你想得那樣 | RISC-V商業模式分析時隔三個月，我終於要來回答什麼是RISC-V 殊不知，在我寫稿的這段日子，Intel的SiFive併購案就已經宣告失敗 (Nvidia的arm併購案也失敗，哈) 但同時，RISC-V也得到了更多的討論，整個生態系的發展也逐漸明朗 RISC-V到底有什麼過人之處，讓整個科技業都如此關注呢? Watch the full video.
2021 Year in Review | Roberto Frazzoli, EDA CafeLet’s start 2022 by quickly recapping some of the major events and trends of 2021, which was another year of the so-called ‘silicon renaissance’ era…
My RISC-V development environment for programming and reverse engineering purposes | Rog3rSm1thHow I set up a RISC-V development environment on my machine in order to develop RISC-V assembler programs and analyze RISC-V linux malwares. Read the…
Successful Conclusion of European Processor Initiative Phase One | European Processor InitiativeThe European Processor Initiative (EPI) has successfully completed its first three-year phase, delivering cutting-edge technologies for European sovereignty on time and within a limited budget,…
The Research of RISC-V for Embedded MCUs | RT-ThreadGreat RISC-V MCUs Display! Patrick Yang, CTO of WCH MicroElectronics has brought their Research of RISC-V for Embedded MCUs at the 2021 RT-Thread Global Tech…
Linux 5.17 Adds Support For “The First Usable, Low-Cost RISC-V Platform” | Michael Larabel, PhoronixIn addition to the prompt support for Qualcomm's Snapdragon 8 Gen 1, another exciting milestone for the in-development Linux 5.17 kernel is introducing mainline support for the…
HEROv2: Full-Stack Open-Source Research Platform for Heterogeneous Computing | Andreas Kurth, Björn Forsberg and Luca BeniniAbstract: Heterogeneous computers integrate general-purpose host processors with domain-specific accelerators to combine versatility with efficiency and high performance. To realize the full potential of heterogeneous…