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SiFive Raises RISC-V performance bar with New Best-in-Class SiFive Performance P650 Processor | SiFive
RISC-V International Ratifies 15 New Specifications, Opening Up New Possibilities for RISC-V Designs
Video: Linux made easy on RISC-V with Ubuntu | Ubuntu
Picocom samples its RISC-V OpenRAN chip | Nick Flaherty, EE News Europe
RISC-V’s open chip processors expected to double in 2022, and double again in 2023 | Hope Reese, TechRepublic
ルネサスに続きIntelもRISC-Vコア採用、Appleも追随か | 小島 郁太郎 日経クロステック／日経エレクトロニクス
The VisionFive V1 is a RISC-V alternative to Raspberry Pi and is coming soon | Sanjiv Sathiah, Notebook Check
Open-Source FPGA-Based RISC-V GPGPU That Supports OpenCL 1.2 | Michael Larabel, Phoronix
Learn the Latest on RISC-V and Vector Processing at All Five Andes Technology’s Presentations at the 2021 RISC-V Summit | Andes Technologies
IAR Systems and Codasip collaborate to enable low-power RISC-V-based applications | IAR Systems
Future Corporation Partners with AB Open for Unique RISC-V PC Project | Gareth Halfacree, AB Open
The Democratization of Chip Design | Mike Wishart and Lucio Lanza, EE Times
Automotive Hardware Functional Safety (FuSa) Features: ISO 26262
Ubuntu 20.04/21.04 64-bit RISC-V released for QEMU, HiFive boards | Jean-Luc Aufranc, CNXsoftLinux 5.13 Release – Notable changes, Arm, MIPS and RISC-V architectures | Jean-Luc Aufranc, CNXsoft
Video: Pineapple – the 32-bit RISC-V CPU that you can make at home | Filip Szkandera
A Free RISC-V CPU Core Builder – Democratizing CPUs | Steve HooverAn Introduction to Digi-Key’s RISC-V Reference Guide | Rich Miron, DigiKeyRISC-V BYTES: CALLER AND CALLEE SAVED REGISTERS | Daniel Mangum
RiVer Core: A RISC-V Core Verification Framework
Video: FreeBSD Developer Summit June 2021 – RISC-V | Mitchell Horne, FreeBSD
A RISC-V Future? SiFive and Andes Aim to Shake Up the Processor Industry | Adrian Gibbons, All About Circuits
Will We Soon Be Running Linux on SiFive Cores Made by Intel? | Jenny List, Hackaday
Mathias Claussen’s Guide Puts Quake on Your RISC-V Microcontroller — on the Game’s 25th Birthday | Gareth Halfacree, hackster.io
SiFive Raises RISC-V performance bar with New Best-in-Class SiFive Performance P650 Processor | SiFiveThe SiFive Performance P650 processor is expected to be the fastest licensable RISC-V processor IP core in the market, bringing RISC-V into new markets and…
RISC-V International Ratifies 15 New Specifications, Opening Up New Possibilities for RISC-V DesignsNew Vector, Scalar Cryptography and Hypervisor specifications will help accelerate the adoption of RISC-V across a variety of market segments. ZURICH – Dec. 2,…
Video: Linux made easy on RISC-V with Ubuntu | UbuntuIn the past decade, open-source and open standards have reshaped the world of technology and produced long-lasting results. With the open Instruction Set Architecture, the…
Picocom samples its RISC-V OpenRAN chip | Nick Flaherty, EE News EuropeSamples of Picocom’s PC802 RISC-V chip for OpenRAN are shipping to customers as the company looks to an investment round. Picocom has received working samples…
RISC-V’s open chip processors expected to double in 2022, and double again in 2023 | Hope Reese, TechRepublicAfter more than 10 years on the market, RISC-V (or "Risk five"), the open-standard architecture for chip development, is taking off. According to a report…
ルネサスに続きIntelもRISC-Vコア採用、Appleも追随か | 小島 郁太郎 日経クロステック／日経エレクトロニクス英Arm（アーム）のCPUコア対抗として注目を集めるRISC-Vコア。ルネサス エレクトロニクスがRISC-Vコアを積極的に採用すると宣言したことによって、国内でも注目度が急上昇している。同社は2021年第4四半期中にRISC-Vコアを集積するASSP（特定用途向けの汎用製品）のサンプル出荷を始める。大々的な発表はなかったが、組み込み業界で話題を呼んだのが、米Intel（インテル）がFPGA向けのCPUコアとして、RISC-Vベースの「Nios V/m」の提供を始めると、21年10月に明らかにしたことである 公式ブログ 。ここに来てRISC-Vになぜ注目が集まっているのか。 Read the full column.
The VisionFive V1 is a RISC-V alternative to Raspberry Pi and is coming soon | Sanjiv Sathiah, Notebook CheckRISC-V SoCs are slowly but surely starting to make their mark. An open-source alternative to ARM’s proprietary RISC-based chips, they have caught the eye of Intel…
Open-Source FPGA-Based RISC-V GPGPU That Supports OpenCL 1.2 | Michael Larabel, PhoronixWhile there was the Libre RISC-V GPU effort aiming to provide an open-source GPU accelerator based on RISC-V, it ultimately turned into Libre-SOC with a…
Learn the Latest on RISC-V and Vector Processing at All Five Andes Technology’s Presentations at the 2021 RISC-V Summit | Andes TechnologiesAndes Technology Corporation (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099), a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and Founding Premier member of…
IAR Systems and Codasip collaborate to enable low-power RISC-V-based applications | IAR SystemsIAR Systems®, the world leader in software tools and services for embedded development, and Codasip®, the leading supplier of customizable RISC-V processor IP, today announced…
Future Corporation Partners with AB Open for Unique RISC-V PC Project | Gareth Halfacree, AB OpenOR IMMEDIATE RELEASE Custom-built RISC-V personal computer features open-hardware front panel. Halifax, UK, 30th November 2021—Open hardware consultancy AB Open has built a unique personal…
The Democratization of Chip Design | Mike Wishart and Lucio Lanza, EE TimesThe well-structured practices of semiconductor design and manufacturing have been flipped on their sides and may never be the same again. The quickly changing dynamics…
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Automotive Hardware Functional Safety (FuSa) Features: ISO 26262In all critical applications like aircrafts, medical equipment and automobiles, there is a requirement for the systems to be reliable and safe. These requirements are…
Ubuntu 20.04/21.04 64-bit RISC-V released for QEMU, HiFive boards | Jean-Luc Aufranc, CNXsoftLet’s a lot of excitement around RISC-V open architecture, but a lot of work still needs to be done to bring the ecosystem to level…
Linux 5.13 Release – Notable changes, Arm, MIPS and RISC-V architectures | Jean-Luc Aufranc, CNXsoftSo we had quite the calm week since rc7, and I see no reason to delay 5.13. The shortlog for the week is tiny, with…
Video: Pineapple – the 32-bit RISC-V CPU that you can make at home | Filip SzkanderaPineapple is a homemade 32-bit RISC-V CPU, that I was working on for the past 2 years. It runs at 500 kHz, has 512 kB…
A Free RISC-V CPU Core Builder – Democratizing CPUs | Steve HooverThere are now over a hundred RISC-V CPU cores listed on riscv.org‘s RISC-V Exchange! Amazing. If you need a RISC-V CPU core, you’ll likely be…
An Introduction to Digi-Key’s RISC-V Reference Guide | Rich Miron, DigiKeyRISC-V (pronounced Risk Five) is a relatively new computer technology that is being actively promoted as a competitor to ARM. A guide has been written…
RISC-V BYTES: CALLER AND CALLEE SAVED REGISTERS | Daniel MangumThis is part of a new series I am starting on the blog where we’ll explore RISC-V by breaking down real programs and explaining how…
RiVer Core: A RISC-V Core Verification FrameworkInCore and Tessolve announce the availability of our open source RISC-V Core Verification tool - RiVer Core. RiVer Core is a python based extensible and…
Video: FreeBSD Developer Summit June 2021 – RISC-V | Mitchell Horne, FreeBSDSee Mitchell Horne discuss the latest developments of FreeBSD on RISC-V. Watch the full video here.
A RISC-V Future? SiFive and Andes Aim to Shake Up the Processor Industry | Adrian Gibbons, All About CircuitsRISC-V, the open-source instruction set architecture, is making inroads against industry giants, with the support of the RISC-V Foundation. Recently, RISC-V has been stirring up the industry…
Will We Soon Be Running Linux on SiFive Cores Made by Intel? | Jenny List, HackadayThere’s an understandably high level of interest in RISC-V processors among our community, but while we’ve devoured the various microcontroller offerings containing the open-source core…
Mathias Claussen’s Guide Puts Quake on Your RISC-V Microcontroller — on the Game’s 25th Birthday | Gareth Halfacree, hackster.ioWhat brought gaming PCs to their knees back in 1996 can now run on a microcontroller — albeit a surprisingly powerful one. Mathias Claussen has…