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RISC-V International Ratifies 15 New Specifications, Opening Up New Possibilities for RISC-V Designs

New Vector, Scalar Cryptography and Hypervisor specifications will help accelerate the adoption of RISC-V across a variety of market segments.   ZURICH – Dec. 2,…

Video: Linux made easy on RISC-V with Ubuntu | Ubuntu

In the past decade, open-source and open standards have reshaped the world of technology and produced long-lasting results. With the open Instruction Set Architecture, the…

Picocom samples its RISC-V OpenRAN chip | Nick Flaherty, EE News Europe

Samples of Picocom’s PC802 RISC-V chip for OpenRAN are shipping to customers as the company looks to an investment round. Picocom has received working samples…

RISC-V’s open chip processors expected to double in 2022, and double again in 2023 | Hope Reese, TechRepublic

After more than 10 years on the market, RISC-V (or "Risk five"), the open-standard architecture for chip development, is taking off. According to a report…

ルネサスに続きIntelもRISC-Vコア採用、Appleも追随か | 小島 郁太郎 日経クロステック/日経エレクトロニクス

英Arm(アーム)のCPUコア対抗として注目を集めるRISC-Vコア。ルネサス エレクトロニクスがRISC-Vコアを積極的に採用すると宣言したことによって、国内でも注目度が急上昇している。同社は2021年第4四半期中にRISC-Vコアを集積するASSP(特定用途向けの汎用製品)のサンプル出荷を始める。大々的な発表はなかったが、組み込み業界で話題を呼んだのが、米Intel(インテル)がFPGA向けのCPUコアとして、RISC-Vベースの「Nios V/m」の提供を始めると、21年10月に明らかにしたことである 公式ブログ 。ここに来てRISC-Vになぜ注目が集まっているのか。 Read the full column. 

The VisionFive V1 is a RISC-V alternative to Raspberry Pi and is coming soon | Sanjiv Sathiah, Notebook Check

RISC-V SoCs are slowly but surely starting to make their mark. An open-source alternative to ARM’s proprietary RISC-based chips, they have caught the eye of Intel…

Open-Source FPGA-Based RISC-V GPGPU That Supports OpenCL 1.2 | Michael Larabel, Phoronix

While there was the Libre RISC-V GPU effort aiming to provide an open-source GPU accelerator based on RISC-V, it ultimately turned into Libre-SOC with a…

Learn the Latest on RISC-V and Vector Processing at All Five Andes Technology’s Presentations at the 2021 RISC-V Summit | Andes Technologies

Andes Technology Corporation (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099), a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and Founding Premier member of…

IAR Systems and Codasip collaborate to enable low-power RISC-V-based applications | IAR Systems

IAR Systems®, the world leader in software tools and services for embedded development, and Codasip®, the leading supplier of customizable RISC-V processor IP, today announced…

Future Corporation Partners with AB Open for Unique RISC-V PC Project | Gareth Halfacree, AB Open

OR IMMEDIATE RELEASE Custom-built RISC-V personal computer features open-hardware front panel. Halifax, UK, 30th November 2021—Open hardware consultancy AB Open has built a unique personal…

The Democratization of Chip Design | Mike Wishart and Lucio Lanza, EE Times

The well-structured practices of semiconductor design and manufacturing have been flipped on their sides and may never be the same again. The quickly changing dynamics…

HLK-W801 board features Alibaba Xuantie XT804 based MCU with WiFi 4, Bluetooth LE 4.2 | Jean-Luc Aufranc, CNX Software

Earlier this month, we wrote about the 240 MHz WinnerMicro W806 Alibaba Xuantie XT804 C-Sky microcontroller with 1MB flash, 288KB SRAM found in the $2…

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Ubuntu 20.04/21.04 64-bit RISC-V released for QEMU, HiFive boards | Jean-Luc Aufranc, CNXsoft

Let’s a lot of excitement around RISC-V open architecture, but a lot of work still needs to be done to bring the ecosystem to level…

Linux 5.13 Release – Notable changes, Arm, MIPS and RISC-V architectures | Jean-Luc Aufranc, CNXsoft

So we had quite the calm week since rc7, and I see no reason to delay 5.13. The shortlog for the week is tiny, with…

Video: Pineapple – the 32-bit RISC-V CPU that you can make at home | Filip Szkandera

Pineapple is a homemade 32-bit RISC-V CPU, that I was working on for the past 2 years. It runs at 500 kHz, has 512 kB…

A Free RISC-V CPU Core Builder – Democratizing CPUs | Steve Hoover

There are now over a hundred RISC-V CPU cores listed on riscv.org‘s RISC-V Exchange! Amazing. If you need a RISC-V CPU core, you’ll likely be…

An Introduction to Digi-Key’s RISC-V Reference Guide | Rich Miron, DigiKey

RISC-V (pronounced Risk Five) is a relatively new computer technology that is being actively promoted as a competitor to ARM. A guide has been written…

RISC-V BYTES: CALLER AND CALLEE SAVED REGISTERS | Daniel Mangum

This is part of a new series I am starting on the blog where we’ll explore RISC-V by breaking down real programs and explaining how…

RiVer Core: A RISC-V Core Verification Framework

InCore and Tessolve announce the availability of our open source RISC-V Core Verification tool - RiVer Core. RiVer Core is a python based extensible and…

Video: FreeBSD Developer Summit June 2021 – RISC-V | Mitchell Horne, FreeBSD

See Mitchell Horne discuss the latest developments of FreeBSD on RISC-V. Watch the full video here. 

A RISC-V Future? SiFive and Andes Aim to Shake Up the Processor Industry | Adrian Gibbons, All About Circuits

RISC-V, the open-source instruction set architecture, is making inroads against industry giants, with the support of the RISC-V Foundation. Recently, RISC-V has been stirring up the industry…

Will We Soon Be Running Linux on SiFive Cores Made by Intel? | Jenny List, Hackaday

There’s an understandably high level of interest in RISC-V processors among our community, but while we’ve devoured the various microcontroller offerings containing the open-source core…

Mathias Claussen’s Guide Puts Quake on Your RISC-V Microcontroller — on the Game’s 25th Birthday | Gareth Halfacree, hackster.io

What brought gaming PCs to their knees back in 1996 can now run on a microcontroller — albeit a surprisingly powerful one. Mathias Claussen has…

Deploying deep learning models on the edge with Kenning

The demand for deploying machine learning models, especially state-of-the-art deep neural networks on edge devices is rapidly growing. Edge AI allows to run inference locally,…