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Safety Critical Real-Time Operating System, SAFERTOS® Available With MiV_RV32 Soft CPU

SAFERTOS® is a real-time operating system (RTOS) designed specifically for use in safety-critical systems. WITTENSTEIN high integrity systems is a Mi-V Ecosystem Partner of Microchip…

SOPHGO Donates 50 RISC-V Motherboards – Learn More About the Pioneer Box

New RISC-V International member SOPHGO is committed to the development and promotion of AI RISC-V CPU and other computing products. RISC-V member Milk-V delivers high-quality…

NOEL-V Processor’s Security Extensions for Safe and Secure Computing

Safety and security are increasingly important aspects when designing computer systems, and work is carried out within RISC-V International technical groups to establish specifications that…

RISC-V International Newsletter – May/June 2023

Message from RISC-V International The growth and reach of the RISC-V ecosystem continues to inspire me during 2023! We are seeing incredible adoption across a…

NOEL-V: A RISC-V Processor for High-Performance Space Applications

Space applications pose significant challenges for electronic systems as they must contend with a myriad of environmental factors once they are launched. These factors include…

RISC-V: An Open Standard Instruction Set Architecture

By Mark Himelstein, CTO of RISC-V International In this blog post, we’ll explain why RISC-V is an open standard instruction set architecture (ISA). We’ve received…

RISC-V Announces Agenda for 2023 RISC-V Summit Europe

The first-ever RISC-V Summit Europe includes keynotes, technical talks, working groups, poster sessions, networking opportunities, and more    RISC-V International will host its first annual…

RISC-V and the Future of Machine Learning Computing

By: Charlie Cheng, Managing Director of Polyhedron LLC Andes Technology Corp. was founded in 2004 and is headquartered in Taiwan, with a significant presence in…

Co-developing RISC-V AI solutions using Vector Extensions in Renode with Kenning

Kenning helps develop real-world Machine Learning solutions for ARM and RISC-V platforms such as NVIDIA Jetson AGX Orin, Google Coral or HiFive Unmatched by seamlessly…

T-Head Prototypes Innovative Hardware Support for Virtual IOMMU

Author: Chong Ren Recently, T-Head has completed the QEMU-based proof-of-concept of hardware support for virtual IOMMU for virtual machines, based on the specification in the…

[INTERVIEW] Calista Redmond, RISC-V International | Open Source Summit NA 2023

Calista Redmond talks with John Furrier & Rob Strechay at Open Source Summit NA 2023 in Vancouver, Canada.

How to Speed Up the Emulating Process with Pydrofoil | Carl Friedrich and Matti Picus

The RISC-V Golden model, also called the Sail model, defines the instruction execution of the RISC-V architecture. As such, it is useful for evaluating the…

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Tiempo Secure becomes a Strategic Member of RISC-V International | Tiempo Secure

As a Strategic member of RISC-V International, Tiempo Secure will secure and integrate processors implementing the RISC-V open standard instruction set architecture (ISA) into its TESIC Secure Element…

RiVAI Technologies Announced New Products in Their RISC-V Vector DSP IP Family: RiVAI V7 And RiVAI V9+ | RiVAI Technologies

RiVAI Technologies has recently launched two new high-performance RISC-V vector IP series products: RiVAI V7 and RiVAI V9+, both with a customized RVV extension optimizing…

Make the Most of Rad-Hard RTG4 FPGAs with the Right Approach to Timing and Resets | Microchip Technology

Developers need to consider timing penalties when using rad-hard parts like our RTG4™ FPGAs. Choosing the right way to apply resets can help you optimize…

RISC-V International Announces Agenda for RISC-V Summit 2022 | RISC-V International

This year’s Summit includes keynotes, technical and industry tracks and tutorials, as well as member exhibitions, networking opportunities and more   RISC-V International will host…

Announcing RISC-V International’s Expanded Developer Boards Program | RISC-V International

The RISC-V Developer Boards program drives RISC-V innovation by making development boards more accessible to the global RISC-V community. Read on to learn how the…

DeepComputing and Xcalibyte announce the ROMA laptop will be powered by TH1520 – the first SoC from Wujian 600’s platform by Alibaba T-Head | Xcalibyte

Alibaba T-Head recently released a brand-new high-performance RISC-V SoC named the TH1520 at The RISC-V Summit China 2022. According to Alibaba “TH1520 demonstrates exceptional speed…

XuanTie Security System Promotes Rapid Migration of Security Applications from Arm to RISC-V | Vincent Cui, Alibaba Cloud

Recently at the RISC-V Summit China 2022 a new high-performance RISC-V-based chip platform named Wujian 600 and the TH1520 chip prototype was revealed. These products…

Customising PolarFire® SoC FPGA for International Space Station Mission | Microchip Technology

Our Mi-V Ecosystem partner Emdalo Technologies Ltd. (Emdalo) has successfully customised PolarFire® SoC FPGA Linux® and associated boot flow for Skycorp Inc.’s recent space-mission on…

Cortus Announces the Launch of its New Secure Low Power RISC-V Microcontrollers | Cortus S.A.S

Cortus, an innovative French fabless semiconductor company today announces the availability of its secure low power RISC-V microcontrollers (MCUs) that address consumer products and automotive…

Renodepedia – From Zephyr’s structured data to traceable and testable open hardware with Renode | Antmicro

The abundance and diversity of hardware platforms brought about by the growth of ARM, RISC-V and the open software ecosystem presents unprecedented opportunities to product…

SOC Verification Flows and Methodologies | Sivakumar P R, Maven Silicon

We need more and more complex chips and SoCs for all new applications that use the latest technologies like AI. For example, Apple’s 5nm SoC…

How will you share your RISC-V knowledge and wisdom? | RISC-V International

The Call for Proposals for the RISC-V Global Summit in San Jose California closes in just 10 days!  Whether you work at a leading research…

Tiempo Secure becomes a Strategic Member of RISC-V International | Tiempo Secure

As a Strategic member of RISC-V International, Tiempo Secure will secure and integrate processors implementing the RISC-V open standard instruction set architecture (ISA) into its TESIC Secure Element…

RiVAI Technologies Announced New Products in Their RISC-V Vector DSP IP Family: RiVAI V7 And RiVAI V9+ | RiVAI Technologies

RiVAI Technologies has recently launched two new high-performance RISC-V vector IP series products: RiVAI V7 and RiVAI V9+, both with a customized RVV extension optimizing…

Make the Most of Rad-Hard RTG4 FPGAs with the Right Approach to Timing and Resets | Microchip Technology

Developers need to consider timing penalties when using rad-hard parts like our RTG4™ FPGAs. Choosing the right way to apply resets can help you optimize…

RISC-V International Announces Agenda for RISC-V Summit 2022 | RISC-V International

This year’s Summit includes keynotes, technical and industry tracks and tutorials, as well as member exhibitions, networking opportunities and more   RISC-V International will host…

Announcing RISC-V International’s Expanded Developer Boards Program | RISC-V International

The RISC-V Developer Boards program drives RISC-V innovation by making development boards more accessible to the global RISC-V community. Read on to learn how the…

DeepComputing and Xcalibyte announce the ROMA laptop will be powered by TH1520 – the first SoC from Wujian 600’s platform by Alibaba T-Head | Xcalibyte

Alibaba T-Head recently released a brand-new high-performance RISC-V SoC named the TH1520 at The RISC-V Summit China 2022. According to Alibaba “TH1520 demonstrates exceptional speed…

XuanTie Security System Promotes Rapid Migration of Security Applications from Arm to RISC-V | Vincent Cui, Alibaba Cloud

Recently at the RISC-V Summit China 2022 a new high-performance RISC-V-based chip platform named Wujian 600 and the TH1520 chip prototype was revealed. These products…

Customising PolarFire® SoC FPGA for International Space Station Mission | Microchip Technology

Our Mi-V Ecosystem partner Emdalo Technologies Ltd. (Emdalo) has successfully customised PolarFire® SoC FPGA Linux® and associated boot flow for Skycorp Inc.’s recent space-mission on…

Cortus Announces the Launch of its New Secure Low Power RISC-V Microcontrollers | Cortus S.A.S

Cortus, an innovative French fabless semiconductor company today announces the availability of its secure low power RISC-V microcontrollers (MCUs) that address consumer products and automotive…

Renodepedia – From Zephyr’s structured data to traceable and testable open hardware with Renode | Antmicro

The abundance and diversity of hardware platforms brought about by the growth of ARM, RISC-V and the open software ecosystem presents unprecedented opportunities to product…

SOC Verification Flows and Methodologies | Sivakumar P R, Maven Silicon

We need more and more complex chips and SoCs for all new applications that use the latest technologies like AI. For example, Apple’s 5nm SoC…

How will you share your RISC-V knowledge and wisdom? | RISC-V International

The Call for Proposals for the RISC-V Global Summit in San Jose California closes in just 10 days!  Whether you work at a leading research…