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Microchip Unveils Industry’s Highest Performance 64-bit HPSC Microprocessor (MPU) Family for a New Era of Autonomous Space Computing
Ashling announces RiscFree™ C/C++ SDK support for India’s C-DAC VEGA RISC-V-based Multi-core Microprocessors
Trillions of Cycles per Day: How SiFive Boosts IP and Software Validation with Synopsys HAPS Prototyping SystemHow Early Power Analysis Drives Energy-Efficient RISC-V Designs
Axelera AI Raises $68 Million Series B Funding to Accelerate Next-Generation Artificial Intelligence
RISC-V Shows Ambitious Prospects in Europe
Tenstorrent’s RISC-V-based Wormhole AI accelerators are available for pre-order today — pre-built workstations start at $12,000
Unpacking the CanMV K230 RISC-V boardRISC-V power controller adds flash memory
DAC 2024 – Showcasing the future of RISC-V through EDANavigating the RISC-V EcosystemMicrochip starts 64bit PIC64 family with RISC-V
RISC-V: An Open Source Approach Accelerating EDA ImplementationsThe Importance of a Standardized Processor TraceRISC-V: An Open Approach to System Security
RISC-V: An Open Source Approach Accelerating EDA ImplementationsThe Importance of a Standardized Processor TraceRISC-V: An Open Approach to System Security
Ventana and Canonical collaborate on enabling enterprise data center, high-performance and AI computing on RISC-Vembedded world 2024 Best in Show Winners[VIDEO] RISC-V CEO interview: Calista Redmond talks future of RISC-V markets at Embedded World 2024RISC-V compiler toolset targets automotive functional safety
Imagination Reveals RISC-V Processor at Embedded World 2024
SiFive Unveils the HiFive Premier P550, the First Commercially Available Out-of-order RISC-V Development BoardImagination’s new Catapult CPU is driving RISC-V device adoptionIAR, Nuclei, and MachineWare Join Forces To Speed Up Innovation in RISC-V ASIL Compliant Automotive Solution
Imagination’s New Catapult CPU Is Driving RISC-V Device AdoptionRISC-V Cryptography Evolution: High Assurance and Post-Quantum Cryptography (RWC 2024)[VIDEO] RISC-V 2024 Update: RISE, AI Accelerators & More
Semidynamics launches AI IP based on single ISA and one toolchain
Microchip Unveils Industry’s Highest Performance 64-bit HPSC Microprocessor (MPU) Family for a New Era of Autonomous Space ComputingCHANDLER, Ariz., JULY 9, 2024 — The world has changed dramatically in the two decades since the debut of what was then considered a trail-blazing space-grade…
Ashling announces RiscFree™ C/C++ SDK support for India’s C-DAC VEGA RISC-V-based Multi-core MicroprocessorsJuly-8 th, 2024, Kochi, India. Embedded tools developer Ashling is pleased to partner with C-DAC, supporting their VEGA RISC-V based multi-core microprocessor family with our…
Trillions of Cycles per Day: How SiFive Boosts IP and Software Validation with Synopsys HAPS Prototyping SystemIn today’s landscape of generative AI, IoT, and more, the demand for advanced RISC-V core IP is rapidly escalating. As technology becomes increasingly software-driven, the…
How Early Power Analysis Drives Energy-Efficient RISC-V DesignsIn the world of processor development, flexibility is becoming a distinct advantage. As an open-standard instruction set architecture (ISA), the fifth iteration of reduced instruction…
Axelera AI Raises $68 Million Series B Funding to Accelerate Next-Generation Artificial IntelligenceSilicon Valley, CA and Eindhoven, NL – June 27, 2024 – Axelera AI, the leading provider of purpose-built AI hardware acceleration technology for generative AI and…
RISC-V Shows Ambitious Prospects in EuropeMunich, Germany — The European tech landscape is witnessing a notable evolution with the growing embrace of RISC-V, the open-source instruction set architecture. During the…
Tenstorrent’s RISC-V-based Wormhole AI accelerators are available for pre-order today — pre-built workstations start at $12,000AI start-up Tenstorrent has announced the commercial release of its Wormhole processors, built to power AI accelerators to compete with Nvidia. Wormhole will power the…
Unpacking the CanMV K230 RISC-V boardRISC-V ISA is almost 15-year old and RISC-V hardware has been popping up regularly for a while. Until recently it was difficult to find a board with…
RISC-V power controller adds flash memoryEggtronic in Italy has added reprogrammable flash memory to its EPIC RISC-V mixed-signal power controller. The Eggtronic RISC-V EPIC 2.0 Flash series provides more flexibility…
DAC 2024 – Showcasing the future of RISC-V through EDAAs I sat on the plane in Boston it’s fair to say that I was curious about what DAC 2024 would bring. The previous year…
Navigating the RISC-V EcosystemThe open-source RISC-V instruction set continues to make inroads across the electronics industry. Electronic Design’s and Microwaves & RF’s Bill Wong offer his take on…
Microchip starts 64bit PIC64 family with RISC-VMicrochip has launched its first 64bit microprocessor line, starting with a multicore RISC-V cluster for its PIC64GX family. The PIC64 GX1000 uses the existing RISC-V…
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RISC-V: An Open Source Approach Accelerating EDA ImplementationsBy Shaun Giebel, Director Product Management at OneSpin Solutions The idea of free and open software has been around for decades and was grown out…
The Importance of a Standardized Processor TraceBy Gadge Panesar, Chief Technology Officer of UltraSoC and Chair of the RISC-V Processor Trace Task Group For the last eighteen months, the RISC-V International…
RISC-V: An Open Approach to System SecurityBy Helena Handschuh, Security Technologies Fellow at Rambus Inc. and Chair of the RISC-V International Security Standing Committee Leveraging open source technology delivers great benefits…
No recent posts listed
RISC-V: An Open Source Approach Accelerating EDA ImplementationsBy Shaun Giebel, Director Product Management at OneSpin Solutions The idea of free and open software has been around for decades and was grown out…
The Importance of a Standardized Processor TraceBy Gadge Panesar, Chief Technology Officer of UltraSoC and Chair of the RISC-V Processor Trace Task Group For the last eighteen months, the RISC-V International…
RISC-V: An Open Approach to System SecurityBy Helena Handschuh, Security Technologies Fellow at Rambus Inc. and Chair of the RISC-V International Security Standing Committee Leveraging open source technology delivers great benefits…
Ventana and Canonical collaborate on enabling enterprise data center, high-performance and AI computing on RISC-VRISC-V, an open standard instruction set architecture (ISA), is rapidly shaping the future of high-performance computing, edge computing, and artificial intelligence. The RISC-V customizable and…
embedded world 2024 Best in Show WinnersAll entries are judged using a 15-point rubric, that assesses design excellence, relative performance, and market impact/disruption. Judging is managed by the ECD Content Team.…
[VIDEO] RISC-V CEO interview: Calista Redmond talks future of RISC-V markets at Embedded World 2024Calista Redmond, the CEO of RISC-V International, spoke at Embedded World 2024, highlighting the growth and global presence of RISC-V. With over 2300 members in…
RISC-V compiler toolset targets automotive functional safetyTASKING has introduced the industry’s first ISO 26262 and ISO/SAE 21434 compliant compiler toolset, designated VX-Toolset for RISC-V. The compiler facilitates the development of automotive…
Imagination Reveals RISC-V Processor at Embedded World 2024Following up on our previous reporting on the changes at UK-based Imagination Technologies, the company announced a new RISC-V applications processor IP, the Imagination APXM-6200 CPU, at…
SiFive Unveils the HiFive Premier P550, the First Commercially Available Out-of-order RISC-V Development BoardHiFive Premier P550 is the highest performance RISC-V development board on the market, offering developers unmatched flexibility and performance Nuremberg, Germany – April 9, 2024 –…
Imagination’s new Catapult CPU is driving RISC-V device adoptionImagination Technologies today unveils the next product in the Catapult CPU IP range, the Imagination APXM-6200 CPU: a RISC-V application processor with compelling performance density, seamless security and the…
IAR, Nuclei, and MachineWare Join Forces To Speed Up Innovation in RISC-V ASIL Compliant Automotive SolutionUppsala, Sweden, April 8, 2024 - IAR, the leader in software solutions and services for embedded development, has joined forces with Nuclei System Technology and…
Imagination’s New Catapult CPU Is Driving RISC-V Device AdoptionLONDON--(BUSINESS WIRE)--Imagination Technologies today unveils the next product in the Catapult CPU IP range, the Imagination APXM-6200 CPU: a RISC-V application processor with compelling performance…
RISC-V Cryptography Evolution: High Assurance and Post-Quantum Cryptography (RWC 2024)NAME is a talk presented by Markku-Juhani O. Saarinen at RWC 2024. This was the first talk in a session on post-quantum implementations, chaired by…
[VIDEO] RISC-V 2024 Update: RISE, AI Accelerators & MoreRISC-V annual update, covering developments in RISC-V hardware and software including RISE, Quintaris, and AI accelerators. Watch the full video.
Semidynamics launches AI IP based on single ISA and one toolchainSemidynamics has announced an all-in-one unified IP solution that combines RISC-V, vector, tensor and its own Gazzillion technology to enable implementation of AI workloads using…