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World’s First RISC-V Pad with LTE Launched by DeepComputing at RISC-V Summit 2023
Renesas Unveils the First Generation of Own 32-bit RISC-V CPU Core Ahead of Competition
Enabling Secure Open Source ML Products with Open Se Cura
IAR Unveils the TCO Calculator: A Breakthrough for Embedded Engineering
Customization? Yes! After tape-out? Yes!
Integrating PikeOS with Microchip’s RISC-V based PolarFire® SoC FPGA | PikeOS: A Versatile Hypervisor-RTOS
Hardware-Assisted Verification: Ideal Foundation for RISC-V Adoption
AMD’s fastest gaming GPU now works with RISC-V CPUs, AMD Radeon RX 7900 XTX open source Linux drivers available
[Case Study] SuperTest – helping TrustInSoft guarantee its customers 100% bug-free source code
Quick Time-To-Market with a Compact and Powerful Microchip PolarFire® SoC FPGA System on Module
RISC-V Gains Momentum As EDA & AI Chip Design Leader Announces New IP
RISC-V Rollouts Abound at This Week’s North America RISC-V Summit
LicheePi 4A RISC-V SBC gets 16GB/128GB version, metal enclosure, 10.1-inch display, and more accessories
Upcoming low cost RISC-V breakout boards start at $1.99
Cadence and Imperas Support NSITEXE in the Development of Advanced RISC V Vector Processor IP for Automotive AI Applications
Takeaways From the First RISC-V Summit EuropeVIDEO: Running LVGL Application on RT-Smart MicroKernel OS with RISC-V
The growth of RISC-V across industries
Imperas Helps Navigate the Journey to RISC-V Based Silicon at DAC 2023
Takeaways From the First RISC-V Summit Europe
The Next Revolution in the Microchip Industry
HPCpodcast: An Architecture Update from RISC-V International CTO Mark Himelstein
Power, automotive and AI markets highly interested in RISC-VIt’s all about RISC-V code size
World’s First RISC-V Pad with LTE Launched by DeepComputing at RISC-V Summit 2023Author: DeepComputing At the recent RISC-V Summit North America, RISC-V innovation pioneer DeepComputing unveiled their latest product - the world’s first RISC-V Pad which can…
Renesas Unveils the First Generation of Own 32-bit RISC-V CPU Core Ahead of CompetitionTOKYO, Japan ― Renesas Electronics Corporation (TSE:6723), a premier supplier of advanced semiconductor solutions, announced today that it has designed and tested a 32-bit CPU core…
Enabling Secure Open Source ML Products with Open Se CuraAt the recent RISC-V Summit in Santa Clara, Antmicro participated in Google’s announcement of the open source release of project Open Se Cura. The announcement…
IAR Unveils the TCO Calculator: A Breakthrough for Embedded EngineeringUppsala, Sweden; November 28, 2023 – IAR, the world leader in software and services for embedded development, has launched an innovative tool to transform how companies…
Customization? Yes! After tape-out? Yes!Another RISC-V Summit is behind us. It was a very well-attended event with many exciting talks and companies highlighting their products at the exhibition. One of the…
Integrating PikeOS with Microchip’s RISC-V based PolarFire® SoC FPGA | PikeOS: A Versatile Hypervisor-RTOSPikeOS, developed by SYSGO GmbH, is a real-time operating system (RTOS) that offers a separation kernel-based hypervisor with multiple partitions for hosting many other operating…
Hardware-Assisted Verification: Ideal Foundation for RISC-V AdoptionThe semiconductor industry has seen RISC-V go from hype to reality, leading us to where we are today. At a time when RISC-V is being…
AMD’s fastest gaming GPU now works with RISC-V CPUs, AMD Radeon RX 7900 XTX open source Linux drivers availableA little over two years ago an enthusiast managed to make AMD's Radeon RX 6700 XT work on a RISC-V development board under Linux, which was…
[Case Study] SuperTest – helping TrustInSoft guarantee its customers 100% bug-free source codeSoftware development tool company TrustInSoft, which serves the international aeronautics, telecommunications, industrial IoT, and automotive industries via its offices in Paris (France) and San Francisco…
Quick Time-To-Market with a Compact and Powerful Microchip PolarFire® SoC FPGA System on ModuleThe Mercury+ MP1 System-on-Module: Enclustra’ s Microchip PolarFire SoC FPGA-based module cuts development time from years to months. Mercury+ MP1 from Enclustra offers many advantages…
RISC-V Gains Momentum As EDA & AI Chip Design Leader Announces New IPIn recent years, the RISC-V architecture has gained significant traction amongst a wide variety of chipmakers. It may be less than a decade since the…
RISC-V Rollouts Abound at This Week’s North America RISC-V SummitAs the RISC-V Summit 2023 comes to a close this week, many organizations have announced new innovations and initiatives in the RISC-V community to make the architecture more accessible…
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LicheePi 4A RISC-V SBC gets 16GB/128GB version, metal enclosure, 10.1-inch display, and more accessoriesLicheePi 4A quad-core RISC-V SBC is now available with 16GB RAM and 128GB eMMC flash, and Sipeed has also introduced various accessories such as a…
Upcoming low cost RISC-V breakout boards start at $1.99AnalogLamb is set to release three affordable RISC-V breakout boards. These boards are based on the CHV32 Series microcontrollers offering support for standard interfaces such…
Cadence and Imperas Support NSITEXE in the Development of Advanced RISC V Vector Processor IP for Automotive AI ApplicationsOxford, United Kingdom, July 10th, 2023 — Imperas Software Ltd., the leader in RISC-V simulation solutions, today announced that Cadence Design Systems, Inc. (Nasdaq: CDNS) has collaborated…
Takeaways From the First RISC-V Summit EuropeRISC-V, a free and open source instruction-set architecture (ISA), has gained significant traction from both industry giants and emerging startups. A simple, scalable design, coupled…
VIDEO: Running LVGL Application on RT-Smart MicroKernel OS with RISC-VRecap of the 2023 RT-Thread Global Tech Conference: Today, we’re excited to feature HIMA, a passionate engineer with experience in developing embedded systems. Currently pursuing…
The growth of RISC-V across industriesRISC-V has seen significant momentum during the past year. According to RISC-V International there are over 10 billion RISC-V cores on the market, with thousands…
Imperas Helps Navigate the Journey to RISC-V Based Silicon at DAC 2023Imperas Software Ltd., the leader in RISC-V models and simulation solutions, today announced its participation at DAC 60 with panels and presentations, and exhibits and…
Takeaways From the First RISC-V Summit EuropeRISC-V, a free and open-source instruction set architecture (ISA), has gained significant traction from both industry giants and emerging startups. A simple, scalable design, coupled…
The Next Revolution in the Microchip IndustryAs microchips increasingly become an integral part of our lives, share prices for many companies that make them are rising fast. Last week shares of…
HPCpodcast: An Architecture Update from RISC-V International CTO Mark HimelsteinMark Himelstein, chief technology officer at RISC-V International, joins us to discuss the latest developments with the RISC-V instruction set architecture and its growing community and…
Power, automotive and AI markets highly interested in RISC-VAt the recent SiFive RISC-V China Technology Forum that took place in Shenzhen, China, SiFive chief architect and the chairman of RISC-V International Krste Asanović…
It’s all about RISC-V code sizeHere at Codasip we’re passionate about reducing the code size of our RISC-V cores for our customers, but why? Are we not making the core…