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RISC-V video editing tested on a Lichee Pi 4A mini PCRISC-V: Pioneering Windows Assembly – A New Era in Computing
SemiDynamics teams for multicore RISC-V chiplet boost
Samsung To Build Next-Gen Tenstorrent AI Chiplet Leveraging RISC-V ArchitectureTenstorrent Selects Samsung Foundry to Manufacture Next-Generation AI ChipletSemidynamics and SignatureIP create a fully tested RISC-V multi-core environment and CHI interconnect[VIDEO] RISC-V Video Editing & 500th Episode
Acura, part of HID, Collaborates with Von Braun Labs and #Data to Develop a RISC-V Based ASIC for Access Control and Free-Flow Tolling
Automated Kernel Testing on RISC-V Hardware
Ashling’s RiscFree™ SDK Now Supports RISC-V® Processor Cores from CAST
It’s not just about the core, it’s also about the systemChipmakers, Researchers, and Hobbyists Show Off the Many Faces of RISC-V
Menta, Codasip join RISC-V 3D neuromorphic AI project
Making Developers the Protagonists: 2023 RT-Thread Global Tech Conference Registration Opens.
RISC-V: Dividing efficiently across different hardwareEsperanto runs generative-AI on RISC-VEsperanto Technologies Announces RISC-V Industry Milestone of Generative AI Models Running on ET-SoC-1; Access to be Made Available to the RISC-V Research CommunitySecure RISC-V accelerator startup VyperCore raises £4 million
Esperanto Technologies Announces RISC-V Industry Milestone of Generative AI Models Running on ET-SoC-1; Access to be Made Available to the RISC-V Research Community
Semidynamics Unveils First Customizable RISC-V Cores for End UsersSpanish startup performs RISC-V open core surgeryProcess agnostic fully customisable RISC-V IP cores10 Breakthrough Technologies That Will Profoundly Affect Our Lives
PINE64 Star64: New single-board computer orderable with RISC-V processor
RISC-V video editing tested on a Lichee Pi 4A mini PCIf you are interested in learning more about how a mini PC can be used for video editing. You might be interested in a new…
RISC-V: Pioneering Windows Assembly – A New Era in ComputingThe world of computer architecture is constantly evolving, with new innovations reshaping the way we interact with technology. In recent years, one of the most…
SemiDynamics teams for multicore RISC-V chiplet boostSemidynamics in Spain has teamed up with SignatureIP in the US to combine multi-core RISC-V IP with CHI interconnect for the development of the latest…
Samsung To Build Next-Gen Tenstorrent AI Chiplet Leveraging RISC-V ArchitectureAI chip manufacturing firm, Tenstorrent, has announced a collaboration with Samsung Foundry to develop next-gen cutting-edge chiplets based on its RISC-V architecture. Samsung's Foundry Division Receives a…
Tenstorrent Selects Samsung Foundry to Manufacture Next-Generation AI ChipletSANTA CLARA, CA – Oct. 2, 2023 Tenstorrent, a company that sells AI processors and licenses AI and RISC-V IP, announced today that it selected Samsung…
Semidynamics and SignatureIP create a fully tested RISC-V multi-core environment and CHI interconnectBarcelona, Spain – 3 October, 2023 -- There is an ever-increasing demand for more powerful chip designs for advanced applications, such as AI and ML, that require many…
[VIDEO] RISC-V Video Editing & 500th EpisodeKdenlive video editing on a Lichee Pi 4A single board computer. Sipeed made it work! This is also the 500th ExplainingComputers video and a celebration…
Acura, part of HID, Collaborates with Von Braun Labs and #Data to Develop a RISC-V Based ASIC for Access Control and Free-Flow TollingBy: Dario Sassi Thober, thober@vonbraunlabs.com.br & Rafael Vidal Aroca, aroca@vonbraunlabs.com.br São Paulo, September 26th, 2023 Today’s global landscape is saturated with access control systems. Acura, part of…
Automated Kernel Testing on RISC-V HardwareAt Codethink we have an increasing interest in the RISC-V architecture, and have, in past years, written several articles related to it, on subjects ranging…
Ashling’s RiscFree™ SDK Now Supports RISC-V® Processor Cores from CASTCAST BA51 and BA53 IP core customers can now use Ashling’s RiscFree™ SDK to develop and debug systems that use these RISC-V processors Woodcliff Lake,…
It’s not just about the core, it’s also about the systemBy: Siemens | Tessent Embedded Analytics | Author: Huw Geddes, Product Manager As more companies design new many-core architectures to gain an advantage over competitors,…
Chipmakers, Researchers, and Hobbyists Show Off the Many Faces of RISC-VIn this roundup, we review the ways RISC-V is making its mark in the computing world—from small-scale gaming projects to large-scale corporate initiatives. While the…
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Menta, Codasip join RISC-V 3D neuromorphic AI projectThe research wing of European RISC-V processor core developer Codasip and French embedded FPGA firm Menta have joined a project to build a 3D neuromorphic…
Making Developers the Protagonists: 2023 RT-Thread Global Tech Conference Registration Opens.The RT-Thread Global Tech Conference (RGTC) is an annual event that brings together developers from around the world to focus on the latest developments in…
RISC-V: Dividing efficiently across different hardwareAuthor: Paul Curtis In previous blog posts I have described the division algorithms SEGGER implemented in emRun. However, which algorithm is best (in terms of…
Esperanto runs generative-AI on RISC-VEsperanto Technologies Inc. (Mountain View, Calif.) has announced it has ported a range of generative AI models to its RISC-V hardware. Initial work includes running…
Esperanto Technologies Announces RISC-V Industry Milestone of Generative AI Models Running on ET-SoC-1; Access to be Made Available to the RISC-V Research CommunityMOUNTAIN VIEW, Calif.--(BUSINESS WIRE)--Esperanto Technologies™, the leading developer of high performance, energy-efficient artificial intelligence solutions based on the RISC-V instruction set, today announced that it…
Secure RISC-V accelerator startup VyperCore raises £4 millionVyperCore Ltd. (Bristol, England), a startup with plans to develop novel processor technology, has raised £4 million (about US$5 million) in seed funding. The company…
Esperanto Technologies Announces RISC-V Industry Milestone of Generative AI Models Running on ET-SoC-1; Access to be Made Available to the RISC-V Research CommunityMOUNTAIN VIEW, Calif.--(BUSINESS WIRE)--Esperanto Technologies™, the leading developer of high performance, energy-efficient artificial intelligence solutions based on the RISC-V instruction set, today announced that it…
Semidynamics Unveils First Customizable RISC-V Cores for End UsersAt its heart, the RISC-V movement centers around the idea of democratizing processor design. With an open-source instruction set architecture (ISA) and a plethora of resources…
Spanish startup performs RISC-V open core surgerySpanish startup SemiDynamics has developed fully configurable 64bit RISC-V processor IP for high-performance chip designs in AI, Machine Learning (ML) and High-Performance Computing (HPC). The…
Process agnostic fully customisable RISC-V IP coresSemidynamics has announced the first, fully customisable, 64-bit RISC-V family of cores that are ideal for handling large amounts of data for applications such as…
10 Breakthrough Technologies That Will Profoundly Affect Our LivesAdvances in technology will continue to affect our lives in myriad ways. Technology Review magazine recently picked ten of the potentially most important ones. Let's…
PINE64 Star64: New single-board computer orderable with RISC-V processorPINE64, which recently introduced the PineTab2 and PineTab-V, has started selling a new RISC-V-based single-board computer (SBC). Announced last year, the Star64 relies on the StarFive JH7110 SoC,…